Message ID | 20221111182535.64844-4-alex.bennee@linaro.org |
---|---|
State | New |
Headers | show
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Fri, 11 Nov 2022 10:25:36 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id E4CFE1FFBB; Fri, 11 Nov 2022 18:25:35 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org> To: qemu-devel@nongnu.org Cc: f4bug@amsat.org, =?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org>, Richard Henderson <richard.henderson@linaro.org>, Mads Ynddal <mads@ynddal.dk>, Alexander Graf <agraf@csgraf.de>, Peter Maydell <peter.maydell@linaro.org>, qemu-arm@nongnu.org (open list:ARM TCG CPUs) Subject: [PATCH v5 03/20] target/arm: ensure HVF traps set appropriate MemTxAttrs Date: Fri, 11 Nov 2022 18:25:18 +0000 Message-Id: <20221111182535.64844-4-alex.bennee@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221111182535.64844-1-alex.bennee@linaro.org> References: <20221111182535.64844-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::430; 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Series |
use MemTxAttrs to avoid current_cpu in hw/
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expand
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diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 060aa0ccf4..d81fbbb2df 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -1233,11 +1233,11 @@ int hvf_vcpu_exec(CPUState *cpu) val = hvf_get_reg(cpu, srt); address_space_write(&address_space_memory, hvf_exit->exception.physical_address, - MEMTXATTRS_UNSPECIFIED, &val, len); + MEMTXATTRS_CPU(cpu), &val, len); } else { address_space_read(&address_space_memory, hvf_exit->exception.physical_address, - MEMTXATTRS_UNSPECIFIED, &val, len); + MEMTXATTRS_CPU(cpu), &val, len); hvf_set_reg(cpu, srt, val); }