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[07/12] ARM: dts: apq8064: add missing i2c2 pinctrl info

Message ID 1456236885-2741-1-git-send-email-srinivas.kandagatla@linaro.org
State Accepted
Commit 7788d439ae08852cf5b54260b2132401761b745a
Headers show

Commit Message

Srinivas Kandagatla Feb. 23, 2016, 2:14 p.m. UTC
This patch adds missing i2c2 pinctrl information in i2c2 node.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

---
 arch/arm/boot/dts/qcom-apq8064-pins.dtsi | 26 ++++++++++++++++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi      |  2 ++
 2 files changed, 28 insertions(+)

-- 
1.9.1


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diff mbox

Patch

diff --git a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
index 0b7b10e..0a342d3 100644
--- a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
@@ -39,6 +39,32 @@ 
 		};
 	};
 
+	i2c2_pins: i2c2 {
+		mux {
+			pins = "gpio24", "gpio25";
+			function = "gsbi2";
+		};
+
+		pinconf {
+			pins = "gpio24", "gpio25";
+			drive-strength = <16>;
+			bias-disable;
+		};
+	};
+
+	i2c2_pins_sleep: i2c2_pins_sleep {
+		mux {
+			pins = "gpio24", "gpio25";
+			function = "gpio";
+		};
+
+		pinconf {
+			pins = "gpio24", "gpio25";
+			drive-strength = <2>;
+			bias-disable = <0>;
+		};
+	};
+
 	i2c3_pins: i2c3 {
 		mux {
 			pins = "gpio8", "gpio9";
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 3fefb2e..2367adc 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -255,6 +255,8 @@ 
 			gsbi2_i2c: i2c@124a0000 {
 				compatible = "qcom,i2c-qup-v1.1.1";
 				reg = <0x124a0000 0x1000>;
+				pinctrl-0 = <&i2c2_pins &i2c2_pins_sleep>;
+				pinctrl-names = "default", "sleep";
 				interrupts = <0 196 IRQ_TYPE_NONE>;
 				clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
 				clock-names = "core", "iface";