| Message ID | 20221128142912.16022-3-marcan@marcan.st |
|---|---|
| State | Accepted |
| Commit | d1a8368d66976ed9cb270bc1c62b79b8727e31a0 |
| Headers | show |
| Series | Apple SoC cpufreq driver | expand |
On Tue, Nov 29, 2022 at 5:28 PM Rob Herring <robh@kernel.org> wrote: > > On Wed, Nov 30, 2022 at 12:17:08AM +0900, Hector Martin wrote: > > On 29/11/2022 23.34, Krzysztof Kozlowski wrote: > > > On 29/11/2022 15:00, Hector Martin wrote: > > >> On 29/11/2022 20.36, Ulf Hansson wrote: > > >> Please, let's introspect about this for a moment. Something is deeply > > >> broken if people with 25+ years being an arch maintainer can't get a > > > > > > If arch maintainer sends patches which does not build (make > > > dt_binding_check), then what do you exactly expect? Accept them just > > > because it is 25+ years of experience or a maintainer? So we have > > > difference processes - for beginners code should compile. For > > > experienced people, it does not have to build because otherwise they > > > will get discouraged? > > > > I expect the process to not be so confusing and frustrating that a > > maintainer with 25+ years of experience gives up. That the bindings > > didn't pass the checker is besides the point. People say the Linux > > kernel community is hostile to newbies. This issue proves it's not just > > newbies, the process is failing even experienced folks. > > IME, a lack of response is a bigger issue and more frustrating. > > > On that specific issue, any other functional open source project would > > have the binding checks be a CI bot, with a friendly message telling you > > what to do to fix it, and it would re-run when you push to the PR again, > > which is a *much* lower friction action than sending a whole new patch > > series out for review via email (if you don't agree with this, then > > you're not the average contributor - the Linux kernel is by far the > > scariest major open source project to contribute to, and I think most > > people would agree with me on that). > > We could probably add a $ci_provider job description to do that. In > fact, I did try that once[1]. The challenge would be what to run if > there's multiple maintainers doing something. Otherwise, it's a > maintainer creating their own thing which we have too much of already. Actually, turns out this pretty much already exists with my CI. I just had to turn on merge requests on the project. If anyone actually uses it, I'll have to tweak it to not do 'make dtbs_check' because that is really slow. And this all runs on my machines, so that is another issue. It already is just running it for patches on the list (which is a different CI job). Just create a MR here: https://gitlab.com/robherring/linux-dt/-/merge_requests Rob
diff --git a/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml b/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml new file mode 100644 index 000000000000..76cb9726660e --- /dev/null +++ b/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml @@ -0,0 +1,117 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/cpufreq/apple,cluster-cpufreq.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple SoC cluster cpufreq device + +maintainers: + - Hector Martin <marcan@marcan.st> + +description: | + Apple SoCs (e.g. M1) have a per-cpu-cluster DVFS controller that is part of + the cluster management register block. This binding uses the standard + operating-points-v2 table to define the CPU performance states, with the + opp-level property specifying the hardware p-state index for that level. + +properties: + compatible: + oneOf: + - items: + - enum: + - apple,t8103-cluster-cpufreq + - apple,t8112-cluster-cpufreq + - const: apple,cluster-cpufreq + - items: + - const: apple,t6000-cluster-cpufreq + - const: apple,t8103-cluster-cpufreq + - const: apple,cluster-cpufreq + + reg: + maxItems: 1 + + '#performance-domain-cells': + const: 0 + +required: + - compatible + - reg + - '#performance-domain-cells' + +additionalProperties: false + +examples: + - | + // This example shows a single CPU per domain and 2 domains, + // with two p-states per domain. + // Shipping hardware has 2-4 CPUs per domain and 2-6 domains. + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu@0 { + compatible = "apple,icestorm"; + device_type = "cpu"; + reg = <0x0 0x0>; + operating-points-v2 = <&ecluster_opp>; + performance-domains = <&cpufreq_e>; + }; + + cpu@10100 { + compatible = "apple,firestorm"; + device_type = "cpu"; + reg = <0x0 0x10100>; + operating-points-v2 = <&pcluster_opp>; + performance-domains = <&cpufreq_p>; + }; + }; + + ecluster_opp: opp-table-0 { + compatible = "operating-points-v2"; + opp-shared; + + opp01 { + opp-hz = /bits/ 64 <600000000>; + opp-level = <1>; + clock-latency-ns = <7500>; + }; + opp02 { + opp-hz = /bits/ 64 <972000000>; + opp-level = <2>; + clock-latency-ns = <22000>; + }; + }; + + pcluster_opp: opp-table-1 { + compatible = "operating-points-v2"; + opp-shared; + + opp01 { + opp-hz = /bits/ 64 <600000000>; + opp-level = <1>; + clock-latency-ns = <8000>; + }; + opp02 { + opp-hz = /bits/ 64 <828000000>; + opp-level = <2>; + clock-latency-ns = <19000>; + }; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + + cpufreq_e: performance-controller@210e20000 { + compatible = "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq"; + reg = <0x2 0x10e20000 0 0x1000>; + #performance-domain-cells = <0>; + }; + + cpufreq_p: performance-controller@211e20000 { + compatible = "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq"; + reg = <0x2 0x11e20000 0 0x1000>; + #performance-domain-cells = <0>; + }; + };