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[2/3] drm/msm/dpu: correct the UBWC version on sm6115

Message ID 20221207142833.204193-3-dmitry.baryshkov@linaro.org
State Accepted
Commit 0b5a8e81877b5149e5df9817fb4fa1864daab512
Headers show
Series drm/msm/dpu: several fixes for UBWC setup | expand

Commit Message

Dmitry Baryshkov Dec. 7, 2022, 2:28 p.m. UTC
According to downstream (bengal-sde.dtsi), the sm6115 uses UBWC 1.0.
Change the catalog entry accordingly.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Abhinav Kumar Jan. 24, 2023, 11:23 p.m. UTC | #1
On 12/7/2022 6:28 AM, Dmitry Baryshkov wrote:
> According to downstream (bengal-sde.dtsi), the sm6115 uses UBWC 1.0.
> Change the catalog entry accordingly.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index b4ca123d8e69..a1b52b9b16f1 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -335,7 +335,7 @@ static const struct dpu_caps sm6115_dpu_caps = {
>   	.max_mixer_blendstages = 0x4,
>   	.qseed_type = DPU_SSPP_SCALER_QSEED3LITE,
>   	.smart_dma_rev = DPU_SSPP_SMART_DMA_V2, /* TODO: v2.5 */
> -	.ubwc_version = DPU_HW_UBWC_VER_20,
> +	.ubwc_version = DPU_HW_UBWC_VER_10,
>   	.has_dim_layer = true,
>   	.has_idle_pc = true,
>   	.max_linewidth = 2160,
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index b4ca123d8e69..a1b52b9b16f1 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -335,7 +335,7 @@  static const struct dpu_caps sm6115_dpu_caps = {
 	.max_mixer_blendstages = 0x4,
 	.qseed_type = DPU_SSPP_SCALER_QSEED3LITE,
 	.smart_dma_rev = DPU_SSPP_SMART_DMA_V2, /* TODO: v2.5 */
-	.ubwc_version = DPU_HW_UBWC_VER_20,
+	.ubwc_version = DPU_HW_UBWC_VER_10,
 	.has_dim_layer = true,
 	.has_idle_pc = true,
 	.max_linewidth = 2160,