| Message ID | 20221205094530.12883-1-johan+linaro@kernel.org |
|---|---|
| State | Accepted |
| Commit | 74eac50391ce42c5d0038d6f0e580576e53aec4e |
| Headers | show |
| Series | dt-bindings: PCI: qcom: Allow 'dma-coherent' property | expand |
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 2f851c804bb0..a5859bb3dc28 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -62,6 +62,8 @@ properties: minItems: 3 maxItems: 13 + dma-coherent: true + interconnects: maxItems: 2
Devices on some PCIe buses may be cache coherent and must be marked as such in the devicetree to avoid data corruption. This is specifically needed on recent Qualcomm platforms like SC8280XP. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> --- Lorenzo, the corresponding SC8280XP DT fix is heading for 6.2 so it would be nice if this one could be merged for 6.2-rc1 (or -rc2) as well to avoid the corresponding DT validation warnings. Johan Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 2 ++ 1 file changed, 2 insertions(+)