From patchwork Tue Mar 1 10:22:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laszlo Ersek X-Patchwork-Id: 63300 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp1736092lbc; Tue, 1 Mar 2016 02:22:34 -0800 (PST) X-Received: by 10.66.163.40 with SMTP id yf8mr28526586pab.148.1456827754129; Tue, 01 Mar 2016 02:22:34 -0800 (PST) Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id g3si10309275pap.29.2016.03.01.02.22.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 01 Mar 2016 02:22:34 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id E0A381A1E6D; Tue, 1 Mar 2016 02:22:40 -0800 (PST) X-Original-To: edk2-devel@ml01.01.org Delivered-To: edk2-devel@ml01.01.org Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6404C1A1E5D for ; Tue, 1 Mar 2016 02:22:40 -0800 (PST) Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) by mx1.redhat.com (Postfix) with ESMTPS id 15474C00064E; Tue, 1 Mar 2016 10:22:32 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-113-49.phx2.redhat.com [10.3.113.49]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u21AMSA0032691; Tue, 1 Mar 2016 05:22:31 -0500 From: Laszlo Ersek To: edk2-devel@ml01.01.org Date: Tue, 1 Mar 2016 11:22:24 +0100 Message-Id: <1456827745-17925-2-git-send-email-lersek@redhat.com> In-Reply-To: <1456827745-17925-1-git-send-email-lersek@redhat.com> References: <1456827745-17925-1-git-send-email-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 Cc: Ruiyu Ni , Michael Kinney Subject: [edk2] [PATCH v3 1/2] MdeModulePkg: PciHostBridgeDxe: insert horizontal whitespace X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" ... in preparation for the next patch. Cc: Ruiyu Ni Cc: Michael Kinney Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek --- MdeModulePkg/Include/Library/PciHostBridgeLib.h | 40 ++++++++++---------- MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c | 18 ++++----- 2 files changed, 29 insertions(+), 29 deletions(-) -- 1.8.3.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/MdeModulePkg/Include/Library/PciHostBridgeLib.h b/MdeModulePkg/Include/Library/PciHostBridgeLib.h index b1dba0f754d7..16ad104a9368 100644 --- a/MdeModulePkg/Include/Library/PciHostBridgeLib.h +++ b/MdeModulePkg/Include/Library/PciHostBridgeLib.h @@ -25,26 +25,26 @@ typedef struct { } PCI_ROOT_BRIDGE_APERTURE; typedef struct { - UINT32 Segment; ///< Segment number. - UINT64 Supports; ///< Supported attributes. - ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes() - ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. - UINT64 Attributes; ///< Initial attributes. - ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes() - ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. - BOOLEAN DmaAbove4G; ///< DMA above 4GB memory. - ///< Set to TRUE when root bridge supports DMA above 4GB memory. - UINT64 AllocationAttributes; ///< Allocation attributes. - ///< Refer to EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM and - ///< EFI_PCI_HOST_BRIDGE_MEM64_DECODE used by GetAllocAttributes() - ///< in EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL. - PCI_ROOT_BRIDGE_APERTURE Bus; ///< Bus aperture which can be used by the root bridge. - PCI_ROOT_BRIDGE_APERTURE Io; ///< IO aperture which can be used by the root bridge. - PCI_ROOT_BRIDGE_APERTURE Mem; ///< MMIO aperture below 4GB which can be used by the root bridge. - PCI_ROOT_BRIDGE_APERTURE MemAbove4G; ///< MMIO aperture above 4GB which can be used by the root bridge. - PCI_ROOT_BRIDGE_APERTURE PMem; ///< Prefetchable MMIO aperture below 4GB which can be used by the root bridge. - PCI_ROOT_BRIDGE_APERTURE PMemAbove4G; ///< Prefetchable MMIO aperture above 4GB which can be used by the root bridge. - EFI_DEVICE_PATH_PROTOCOL *DevicePath; ///< Device path. + UINT32 Segment; ///< Segment number. + UINT64 Supports; ///< Supported attributes. + ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes() + ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. + UINT64 Attributes; ///< Initial attributes. + ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes() + ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. + BOOLEAN DmaAbove4G; ///< DMA above 4GB memory. + ///< Set to TRUE when root bridge supports DMA above 4GB memory. + UINT64 AllocationAttributes; ///< Allocation attributes. + ///< Refer to EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM and + ///< EFI_PCI_HOST_BRIDGE_MEM64_DECODE used by GetAllocAttributes() + ///< in EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL. + PCI_ROOT_BRIDGE_APERTURE Bus; ///< Bus aperture which can be used by the root bridge. + PCI_ROOT_BRIDGE_APERTURE Io; ///< IO aperture which can be used by the root bridge. + PCI_ROOT_BRIDGE_APERTURE Mem; ///< MMIO aperture below 4GB which can be used by the root bridge. + PCI_ROOT_BRIDGE_APERTURE MemAbove4G; ///< MMIO aperture above 4GB which can be used by the root bridge. + PCI_ROOT_BRIDGE_APERTURE PMem; ///< Prefetchable MMIO aperture below 4GB which can be used by the root bridge. + PCI_ROOT_BRIDGE_APERTURE PMemAbove4G; ///< Prefetchable MMIO aperture above 4GB which can be used by the root bridge. + EFI_DEVICE_PATH_PROTOCOL *DevicePath; ///< Device path. } PCI_ROOT_BRIDGE; /** diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c index 332860eb3819..932aefd5d621 100644 --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c @@ -78,18 +78,18 @@ CreateRootBridge ( DEBUG ((EFI_D_INFO, "RootBridge: ")); DEBUG ((EFI_D_INFO, "%s\n", DevicePathStr = ConvertDevicePathToText (Bridge->DevicePath, FALSE, FALSE))); - DEBUG ((EFI_D_INFO, "Support/Attr: %lx / %lx\n", Bridge->Supports, Bridge->Attributes)); - DEBUG ((EFI_D_INFO, " DmaAbove4G: %s\n", Bridge->DmaAbove4G ? L"Yes" : L"No")); - DEBUG ((EFI_D_INFO, " AllocAttr: %lx (%s%s)\n", Bridge->AllocationAttributes, + DEBUG ((EFI_D_INFO, " Support/Attr: %lx / %lx\n", Bridge->Supports, Bridge->Attributes)); + DEBUG ((EFI_D_INFO, " DmaAbove4G: %s\n", Bridge->DmaAbove4G ? L"Yes" : L"No")); + DEBUG ((EFI_D_INFO, " AllocAttr: %lx (%s%s)\n", Bridge->AllocationAttributes, (Bridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM) != 0 ? L"CombineMemPMem " : L"", (Bridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_MEM64_DECODE) != 0 ? L"Mem64Decode" : L"" )); - DEBUG ((EFI_D_INFO, " Bus: %lx - %lx\n", Bridge->Bus.Base, Bridge->Bus.Limit)); - DEBUG ((EFI_D_INFO, " Io: %lx - %lx\n", Bridge->Io.Base, Bridge->Io.Limit)); - DEBUG ((EFI_D_INFO, " Mem: %lx - %lx\n", Bridge->Mem.Base, Bridge->Mem.Limit)); - DEBUG ((EFI_D_INFO, " MemAbove4G: %lx - %lx\n", Bridge->MemAbove4G.Base, Bridge->MemAbove4G.Limit)); - DEBUG ((EFI_D_INFO, " PMem: %lx - %lx\n", Bridge->PMem.Base, Bridge->PMem.Limit)); - DEBUG ((EFI_D_INFO, " PMemAbove4G: %lx - %lx\n", Bridge->PMemAbove4G.Base, Bridge->PMemAbove4G.Limit)); + DEBUG ((EFI_D_INFO, " Bus: %lx - %lx\n", Bridge->Bus.Base, Bridge->Bus.Limit)); + DEBUG ((EFI_D_INFO, " Io: %lx - %lx\n", Bridge->Io.Base, Bridge->Io.Limit)); + DEBUG ((EFI_D_INFO, " Mem: %lx - %lx\n", Bridge->Mem.Base, Bridge->Mem.Limit)); + DEBUG ((EFI_D_INFO, " MemAbove4G: %lx - %lx\n", Bridge->MemAbove4G.Base, Bridge->MemAbove4G.Limit)); + DEBUG ((EFI_D_INFO, " PMem: %lx - %lx\n", Bridge->PMem.Base, Bridge->PMem.Limit)); + DEBUG ((EFI_D_INFO, " PMemAbove4G: %lx - %lx\n", Bridge->PMemAbove4G.Base, Bridge->PMemAbove4G.Limit)); // // Make sure Mem and MemAbove4G apertures are valid