From patchwork Tue Mar 1 10:22:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laszlo Ersek X-Patchwork-Id: 63301 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp1736106lbc; Tue, 1 Mar 2016 02:22:37 -0800 (PST) X-Received: by 10.98.66.133 with SMTP id h5mr3119117pfd.89.1456827755631; Tue, 01 Mar 2016 02:22:35 -0800 (PST) Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id y9si9697261pfa.174.2016.03.01.02.22.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 01 Mar 2016 02:22:35 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 236791A1E70; Tue, 1 Mar 2016 02:22:43 -0800 (PST) X-Original-To: edk2-devel@ml01.01.org Delivered-To: edk2-devel@ml01.01.org Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1B0EA1A1E70 for ; Tue, 1 Mar 2016 02:22:42 -0800 (PST) Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) by mx1.redhat.com (Postfix) with ESMTPS id B9CA464D07; Tue, 1 Mar 2016 10:22:33 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-113-49.phx2.redhat.com [10.3.113.49]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u21AMSA1032691; Tue, 1 Mar 2016 05:22:32 -0500 From: Laszlo Ersek To: edk2-devel@ml01.01.org Date: Tue, 1 Mar 2016 11:22:25 +0100 Message-Id: <1456827745-17925-3-git-send-email-lersek@redhat.com> In-Reply-To: <1456827745-17925-1-git-send-email-lersek@redhat.com> References: <1456827745-17925-1-git-send-email-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Tue, 01 Mar 2016 10:22:33 +0000 (UTC) Cc: Ruiyu Ni , Jordan Justen , Michael Kinney , Marcel Apfelbaum Subject: [edk2] [PATCH v3 2/2] MdeModulePkg: PciHostBridgeDxe: don't assume extended config space X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" The "pc" ("pc-i440fx-*") machine types of QEMU don't support extended config space. Accordingly, OVMF will use the following library instances in connection with the core PciHostBridgeDxe driver: BasePciSegmentLibPci [class: PciSegmentLib] BasePciLibCf8 [class: PciLib] BasePciCf8Lib [class: PciCf8Lib] Add a new field to the PCI_ROOT_BRIDGE structure so that RootBridgeIoCheckParameter() can catch config space offsets above 0xFF on such old (emulated) platforms. Cc: Ruiyu Ni Cc: Jordan Justen Cc: Marcel Apfelbaum Cc: Michael Kinney Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek --- Notes: v3: - invert the meaning of the field: replace ExtendedConfigSpace with NoExtendedConfigSpace [Ray] v2: - replace the PCI config space "aperture" with a dedicated BOOLEAN flag called ExtendedConfigSpace [Ray] - simplify the commit message MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridge.h | 1 + MdeModulePkg/Include/Library/PciHostBridgeLib.h | 4 ++++ MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c | 4 +++- 3 files changed, 8 insertions(+), 1 deletion(-) -- 1.8.3.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridge.h b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridge.h index b1e83f1c9089..aa3f43a511c4 100644 --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridge.h +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridge.h @@ -72,6 +72,7 @@ typedef struct { PCI_ROOT_BRIDGE_APERTURE MemAbove4G; PCI_ROOT_BRIDGE_APERTURE PMemAbove4G; BOOLEAN DmaAbove4G; + BOOLEAN NoExtendedConfigSpace; VOID *ConfigBuffer; EFI_DEVICE_PATH_PROTOCOL *DevicePath; CHAR16 *DevicePathStr; diff --git a/MdeModulePkg/Include/Library/PciHostBridgeLib.h b/MdeModulePkg/Include/Library/PciHostBridgeLib.h index 16ad104a9368..b67ac5e17d48 100644 --- a/MdeModulePkg/Include/Library/PciHostBridgeLib.h +++ b/MdeModulePkg/Include/Library/PciHostBridgeLib.h @@ -34,6 +34,10 @@ typedef struct { ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. BOOLEAN DmaAbove4G; ///< DMA above 4GB memory. ///< Set to TRUE when root bridge supports DMA above 4GB memory. + BOOLEAN NoExtendedConfigSpace; ///< When FALSE, the root bridge supports + ///< Extended (4096-byte) Configuration Space. + ///< When TRUE, the root bridge supports + ///< 256-byte Configuration Space only. UINT64 AllocationAttributes; ///< Allocation attributes. ///< Refer to EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM and ///< EFI_PCI_HOST_BRIDGE_MEM64_DECODE used by GetAllocAttributes() diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c index 932aefd5d621..cda9b49b3925 100644 --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c @@ -80,6 +80,7 @@ CreateRootBridge ( DEBUG ((EFI_D_INFO, "%s\n", DevicePathStr = ConvertDevicePathToText (Bridge->DevicePath, FALSE, FALSE))); DEBUG ((EFI_D_INFO, " Support/Attr: %lx / %lx\n", Bridge->Supports, Bridge->Attributes)); DEBUG ((EFI_D_INFO, " DmaAbove4G: %s\n", Bridge->DmaAbove4G ? L"Yes" : L"No")); + DEBUG ((EFI_D_INFO, "NoExtConfSpace: %s\n", Bridge->NoExtendedConfigSpace ? L"Yes" : L"No")); DEBUG ((EFI_D_INFO, " AllocAttr: %lx (%s%s)\n", Bridge->AllocationAttributes, (Bridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM) != 0 ? L"CombineMemPMem " : L"", (Bridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_MEM64_DECODE) != 0 ? L"Mem64Decode" : L"" @@ -155,6 +156,7 @@ CreateRootBridge ( RootBridge->Supports = Bridge->Supports; RootBridge->Attributes = Bridge->Attributes; RootBridge->DmaAbove4G = Bridge->DmaAbove4G; + RootBridge->NoExtendedConfigSpace = Bridge->NoExtendedConfigSpace; RootBridge->AllocationAttributes = Bridge->AllocationAttributes; RootBridge->DevicePath = DuplicateDevicePath (Bridge->DevicePath); RootBridge->DevicePathStr = DevicePathStr; @@ -351,7 +353,7 @@ RootBridgeIoCheckParameter ( Address = PciRbAddr->Register; } Base = 0; - Limit = 0xFFF; + Limit = RootBridge->NoExtendedConfigSpace ? 0xFF : 0xFFF; } if (Address < Base) {