diff mbox series

[1/2] wifi: rtl8xxxu: Fix assignment to bit field priv->pi_enabled

Message ID 4368d585-11ec-d3c7-ec12-7f0afdcedfda@gmail.com
State New
Headers show
Series [1/2] wifi: rtl8xxxu: Fix assignment to bit field priv->pi_enabled | expand

Commit Message

Bitterblue Smith Dec. 8, 2022, 7:32 p.m. UTC
Just because priv->pi_enabled is only one bit doesn't mean it works
like a bool. The value assigned to it loses all bits except bit 0,
so only assign 0 or 1 to it.

This affects the RTL8188FU, but fixing the assignment didn't make
a difference for my device.

Fixes: c888183b21f3 ("wifi: rtl8xxxu: Support new chip RTL8188FU")
Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com>
---
 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Kalle Valo Dec. 14, 2022, 12:23 p.m. UTC | #1
Bitterblue Smith <rtl8821cerfe2@gmail.com> wrote:

> Just because priv->pi_enabled is only one bit doesn't mean it works
> like a bool. The value assigned to it loses all bits except bit 0,
> so only assign 0 or 1 to it.
> 
> This affects the RTL8188FU, but fixing the assignment didn't make
> a difference for my device.
> 
> Fixes: c888183b21f3 ("wifi: rtl8xxxu: Support new chip RTL8188FU")
> Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com>
> Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>

2 patches applied to wireless-next.git, thanks.

9e32b4a709f0 wifi: rtl8xxxu: Fix assignment to bit field priv->pi_enabled
639c26faf9b1 wifi: rtl8xxxu: Fix assignment to bit field priv->cck_agc_report_type
diff mbox series

Patch

diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c
index 2c4f403ba68f..97e7ff7289fa 100644
--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c
+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c
@@ -1122,7 +1122,7 @@  static void rtl8188fu_phy_iqcalibrate(struct rtl8xxxu_priv *priv,
 
 	if (t == 0) {
 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM1);
-		priv->pi_enabled = val32 & FPGA0_HSSI_PARM1_PI;
+		priv->pi_enabled = u32_get_bits(val32, FPGA0_HSSI_PARM1_PI);
 	}
 
 	/* save RF path */