diff mbox series

[1/2] arm64: dts: qcom: pm8450a: add rtc node

Message ID 20221213005539.1133443-1-echanude@redhat.com
State Superseded
Headers show
Series [1/2] arm64: dts: qcom: pm8450a: add rtc node | expand

Commit Message

Eric Chanudet Dec. 13, 2022, 12:55 a.m. UTC
Add the rtc block on pm8450a first pmic to enable the rtc for
sa8540p-ride.

Signed-off-by: Eric Chanudet <echanude@redhat.com>
---
 arch/arm64/boot/dts/qcom/pm8450a.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Dmitry Baryshkov Dec. 13, 2022, 1:18 a.m. UTC | #1
On 13 December 2022 03:55:38 GMT+03:00, Eric Chanudet <echanude@redhat.com> wrote:
>Add the rtc block on pm8450a first pmic to enable the rtc for
>sa8540p-ride.
>
>Signed-off-by: Eric Chanudet <echanude@redhat.com>
>---
> arch/arm64/boot/dts/qcom/pm8450a.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
>diff --git a/arch/arm64/boot/dts/qcom/pm8450a.dtsi b/arch/arm64/boot/dts/qcom/pm8450a.dtsi
>index 34fc72896761..af761dbfbc66 100644
>--- a/arch/arm64/boot/dts/qcom/pm8450a.dtsi
>+++ b/arch/arm64/boot/dts/qcom/pm8450a.dtsi
>@@ -13,6 +13,14 @@ pm8450a: pmic@0 {
> 		#address-cells = <1>;
> 		#size-cells = <0>;
> 
>+		rtc@6000 {
>+			compatible = "qcom,pm8941-rtc";
>+			reg = <0x6000>;
>+			reg-names = "rtc", "alarm";
>+			interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;


0x60?

>+			wakeup-source;
>+		};
>+
> 		pm8450a_gpios: gpio@c000 {
> 			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
> 			reg = <0xc000>;
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/pm8450a.dtsi b/arch/arm64/boot/dts/qcom/pm8450a.dtsi
index 34fc72896761..af761dbfbc66 100644
--- a/arch/arm64/boot/dts/qcom/pm8450a.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8450a.dtsi
@@ -13,6 +13,14 @@  pm8450a: pmic@0 {
 		#address-cells = <1>;
 		#size-cells = <0>;
 
+		rtc@6000 {
+			compatible = "qcom,pm8941-rtc";
+			reg = <0x6000>;
+			reg-names = "rtc", "alarm";
+			interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
+			wakeup-source;
+		};
+
 		pm8450a_gpios: gpio@c000 {
 			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
 			reg = <0xc000>;