@@ -31,7 +31,7 @@ OBJECT_DECLARE_CPU_TYPE(AVRCPU, AVRCPUClass, AVR_CPU)
/**
* AVRCPUClass:
* @parent_realize: The parent class' realize handler.
- * @parent_reset: The parent class' reset handler.
+ * @parent_phases: The parent class' reset phase handlers.
*
* A AVR CPU model.
*/
@@ -40,7 +40,7 @@ struct AVRCPUClass {
CPUClass parent_class;
/*< public >*/
DeviceRealize parent_realize;
- DeviceReset parent_reset;
+ ResettablePhases parent_phases;
};
@@ -67,14 +67,16 @@ static void avr_restore_state_to_opc(CPUState *cs,
env->pc_w = data[0];
}
-static void avr_cpu_reset(DeviceState *ds)
+static void avr_cpu_reset_hold(Object *obj)
{
- CPUState *cs = CPU(ds);
+ CPUState *cs = CPU(obj);
AVRCPU *cpu = AVR_CPU(cs);
AVRCPUClass *mcc = AVR_CPU_GET_CLASS(cpu);
CPUAVRState *env = &cpu->env;
- mcc->parent_reset(ds);
+ if (mcc->parent_phases.hold) {
+ mcc->parent_phases.hold(obj);
+ }
env->pc_w = 0;
env->sregI = 1;
@@ -223,9 +225,12 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
CPUClass *cc = CPU_CLASS(oc);
AVRCPUClass *mcc = AVR_CPU_CLASS(oc);
+ ResettableClass *rc = RESETTABLE_CLASS(oc);
device_class_set_parent_realize(dc, avr_cpu_realizefn, &mcc->parent_realize);
- device_class_set_parent_reset(dc, avr_cpu_reset, &mcc->parent_reset);
+
+ resettable_class_set_parent_phases(rc, NULL, avr_cpu_reset_hold, NULL,
+ &mcc->parent_phases);
cc->class_by_name = avr_cpu_class_by_name;