diff mbox

[edk2,wave,2,3/3] OvmfPkg: PciHostBridgeLib: install 64-bit PCI host aperture

Message ID 1457959980-29438-4-git-send-email-lersek@redhat.com
State New
Headers show

Commit Message

Laszlo Ersek March 14, 2016, 12:53 p.m. UTC 
On the normal boot path (which is when PciHostBridgeDxe runs), the PCDs
have been calculated; report the 64-bit PCI host aperture to
PciHostBridgeDxe.

In the Ia32 build, the PCD values (zeros) come directly from the DEC file,
and this patch makes no difference.

Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>
Cc: Thomas Lamprecht <t.lamprecht@proxmox.com>
Ref: https://github.com/tianocore/edk2/issues/59
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>

---
 OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf | 2 ++
 OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c   | 7 +++++++
 2 files changed, 9 insertions(+)

-- 
1.8.3.1

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diff mbox

Patch

diff --git a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
index bbec74645c83..7a964c74c6cc 100644
--- a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
+++ b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
@@ -47,8 +47,10 @@  [LibraryClasses]
   QemuFwCfgLib
 
 [Pcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase
   gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId
diff --git a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
index 3e02778492a8..1d3d10ad7379 100644
--- a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
+++ b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
@@ -128,14 +128,21 @@  InitRootBridge (
   RootBus->PMem.Base            = 0;
   RootBus->PMem.Limit           = 0;
   RootBus->PMemAbove4G.Base     = 0;
   RootBus->PMemAbove4G.Limit    = 0;
   RootBus->MemAbove4G.Base      = 0;
   RootBus->MemAbove4G.Limit     = 0;
 
+  if (PcdGet64 (PcdPciMmio64Size) > 0) {
+    RootBus->AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
+    RootBus->MemAbove4G.Base       = PcdGet64 (PcdPciMmio64Base);
+    RootBus->MemAbove4G.Limit      = PcdGet64 (PcdPciMmio64Base) +
+                                     (PcdGet64 (PcdPciMmio64Size) - 1);
+  }
+
   RootBus->Bus.Base  = RootBusNumber;
   RootBus->Bus.Limit = MaxSubBusNumber;
   RootBus->Io.Base   = PcdGet64 (PcdPciIoBase);
   RootBus->Io.Limit  = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);
   RootBus->Mem.Base  = PcdGet64 (PcdPciMmio32Base);
   RootBus->Mem.Limit = PcdGet64 (PcdPciMmio32Base) +
                        (PcdGet64 (PcdPciMmio32Size) - 1);