diff mbox series

[v6,6/6] ARM: dts: qcom: fix various wrong definition for kpss-acc-v2

Message ID 20230110183259.19142-7-ansuelsmth@gmail.com
State New
Headers show
Series Krait Documentation conversion | expand

Commit Message

Christian Marangi Jan. 10, 2023, 6:32 p.m. UTC
Fix dtbs_check warning now that we have a correct kpss-acc-v2 yaml
schema.
Change acc node naming to power-controller and add missing
binding #power-domain-cells for each kpss-acc-v2 power-controller
to reflect Documentation schema.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
 arch/arm/boot/dts/qcom-apq8084.dtsi | 12 ++++++++----
 arch/arm/boot/dts/qcom-ipq4019.dtsi | 12 ++++++++----
 arch/arm/boot/dts/qcom-msm8974.dtsi | 12 ++++++++----
 3 files changed, 24 insertions(+), 12 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 4b0d2b4f4b6a..51c5867eb950 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -353,28 +353,32 @@  saw_l2: power-controller@f9012000 {
 			regulator;
 		};
 
-		acc0: clock-controller@f9088000 {
+		acc0: power-controller@f9088000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0xf9088000 0x1000>,
 			      <0xf9008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc1: clock-controller@f9098000 {
+		acc1: power-controller@f9098000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0xf9098000 0x1000>,
 			      <0xf9008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc2: clock-controller@f90a8000 {
+		acc2: power-controller@f90a8000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0xf90a8000 0x1000>,
 			      <0xf9008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc3: clock-controller@f90b8000 {
+		acc3: power-controller@f90b8000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0xf90b8000 0x1000>,
 			      <0xf9008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
 		restart@fc4ab000 {
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index acb08dcf9442..ee464aedece9 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -325,24 +325,28 @@  crypto: crypto@8e3a000 {
 			status = "disabled";
 		};
 
-		acc0: clock-controller@b088000 {
+		acc0: power-controller@b088000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0x0b088000 0x1000>, <0xb008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc1: clock-controller@b098000 {
+		acc1: power-controller@b098000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0x0b098000 0x1000>, <0xb008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc2: clock-controller@b0a8000 {
+		acc2: power-controller@b0a8000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0x0b0a8000 0x1000>, <0xb008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc3: clock-controller@b0b8000 {
+		acc3: power-controller@b0b8000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
 		saw0: regulator@b089000 {
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 4b485f5612c4..59613aa52e25 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -416,24 +416,28 @@  saw_l2: power-controller@f9012000 {
 			regulator;
 		};
 
-		acc0: clock-controller@f9088000 {
+		acc0: power-controller@f9088000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0xf9088000 0x1000>, <0xf9008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc1: clock-controller@f9098000 {
+		acc1: power-controller@f9098000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0xf9098000 0x1000>, <0xf9008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc2: clock-controller@f90a8000 {
+		acc2: power-controller@f90a8000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc3: clock-controller@f90b8000 {
+		acc3: power-controller@f90b8000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
 		sdhc_1: mmc@f9824900 {