diff mbox series

[v3,4/7] arm64: dts: qcom: sc7280: Update VA/RX/TX macro clock nodes

Message ID 1674131227-26456-5-git-send-email-quic_srivasam@quicinc.com
State New
Headers show
Series Add SC7280 audioreach device tree nodes | expand

Commit Message

Srinivasa Rao Mandadapu Jan. 19, 2023, 12:27 p.m. UTC 
Update VA, RX and TX macro and lpass_tlmm clock properties and
enable them.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Tested-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com>
---
 .../qcom/sc7280-herobrine-audioreach-wcd9385.dtsi  | 59 ++++++++++++++++++++++
 1 file changed, 59 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
index 81e0f3a..674b01a 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
@@ -8,8 +8,67 @@ 
 
 #include <dt-bindings/sound/qcom,q6afe.h>
 
+/delete-node/ &lpass_rx_macro;
+/delete-node/ &lpass_tx_macro;
+/delete-node/ &lpass_va_macro;
+
 /{
 	/* BOARD-SPECIFIC TOP LEVEL NODES */
+	lpass_rx_macro: codec@3200000 {
+		compatible = "qcom,sc7280-lpass-rx-macro";
+		reg = <0 0x03200000 0 0x1000>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&lpass_rx_swr_clk>, <&lpass_rx_swr_data>;
+
+		clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+			 <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK  LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+			 <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+			 <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+			 <&lpass_va_macro>;
+
+		clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";
+
+		#clock-cells = <0>;
+		#sound-dai-cells = <1>;
+	};
+
+	lpass_tx_macro: codec@3220000 {
+		compatible = "qcom,sc7280-lpass-tx-macro";
+		reg = <0 0x03220000 0 0x1000>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&lpass_tx_swr_clk>, <&lpass_tx_swr_data>;
+
+		clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+			 <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK  LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+			 <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+			 <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+			 <&lpass_va_macro>;
+
+		clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";
+
+		#clock-cells = <0>;
+		#sound-dai-cells = <1>;
+	};
+
+	lpass_va_macro: codec@3370000 {
+		compatible = "qcom,sc7280-lpass-va-macro";
+		reg = <0 0x03370000 0 0x1000>;
+
+		pinctrl-0 = <&lpass_dmic01_clk>, <&lpass_dmic01_data>;
+		pinctrl-names = "default";
+
+		clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+			 <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+			 <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+
+		clock-names = "mclk", "macro", "dcodec";
+
+		#clock-cells = <0>;
+		#sound-dai-cells = <1>;
+	};
+
 	sound: sound {
 		compatible = "google,sc7280-herobrine";
 		model = "SC7280-AUDIOREACH";