| Message ID | 20230118011230.25847-1-duke_xinanwen@163.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v2] bus: mhi: host: pci_generic: Add support for Quectel RM520N-GL modem | expand |
On Tue, Jan 17, 2023 at 05:12:30PM -0800, Duke Xin(辛安文) wrote: > The project is based on Qualcomm's sdx6x chips for laptop,so the mhi interface definition and > enumeration align with previous Quectel sdx24 configuration > How about, RM520N-GL modem is based on SDX6x chipsets from Qualcomm and they reuse Quectel's em1xx MHI configuration. > Signed-off-by: Duke Xin(辛安文) <duke_xinanwen@163.com> > --- > drivers/bus/mhi/host/pci_generic.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c > index f39657f71483..e1d697839535 100644 > --- a/drivers/bus/mhi/host/pci_generic.c > +++ b/drivers/bus/mhi/host/pci_generic.c > @@ -335,6 +335,16 @@ static const struct mhi_pci_dev_info mhi_quectel_em1xx_info = { > .sideband_wake = true, > }; > > +static const struct mhi_pci_dev_info mhi_quectel_rm5xx_info = { > + .name = "quectel-rm5xx", > + .edl = "qcom/prog_firehose_sdx6x.elf", > + .config = &modem_quectel_em1xx_config, > + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, > + .dma_data_width = 32, > + .mru_default = 32768, > + .sideband_wake = true, > +}; > + > static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = { > MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 32, 0), > MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 32, 0), > @@ -569,6 +579,8 @@ static const struct pci_device_id mhi_pci_id_table[] = { > .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, > { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x2001), /* EM120R-GL for FCCL (sdx24) */ > .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, > + { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1004), /* RM520N-GL (sdx6x) */ > + .driver_data = (kernel_ulong_t) &mhi_quectel_rm5xx_info }, Entry needs to be sorted. See the comment above mhi_pci_id_table definition. Thanks, Mani > /* T99W175 (sdx55), Both for eSIM and Non-eSIM */ > { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0ab), > .driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info }, > -- > 2.25.1 >
diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c index f39657f71483..e1d697839535 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -335,6 +335,16 @@ static const struct mhi_pci_dev_info mhi_quectel_em1xx_info = { .sideband_wake = true, }; +static const struct mhi_pci_dev_info mhi_quectel_rm5xx_info = { + .name = "quectel-rm5xx", + .edl = "qcom/prog_firehose_sdx6x.elf", + .config = &modem_quectel_em1xx_config, + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, + .dma_data_width = 32, + .mru_default = 32768, + .sideband_wake = true, +}; + static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = { MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 32, 0), MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 32, 0), @@ -569,6 +579,8 @@ static const struct pci_device_id mhi_pci_id_table[] = { .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x2001), /* EM120R-GL for FCCL (sdx24) */ .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, + { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1004), /* RM520N-GL (sdx6x) */ + .driver_data = (kernel_ulong_t) &mhi_quectel_rm5xx_info }, /* T99W175 (sdx55), Both for eSIM and Non-eSIM */ { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0ab), .driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info },
The project is based on Qualcomm's sdx6x chips for laptop,so the mhi interface definition and enumeration align with previous Quectel sdx24 configuration Signed-off-by: Duke Xin(辛安文) <duke_xinanwen@163.com> --- drivers/bus/mhi/host/pci_generic.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)