| Message ID | 1675318653-28352-5-git-send-email-quic_srivasam@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add resets for ADSP based audio clock controller driver | expand |
Quoting Srinivasa Rao Mandadapu (2023-02-01 22:17:32) > Merge AHBM and AHBS clocks into lpass_aon clk_regmap structure as they > are using same register space. > Add conditional check for doing Q6 AHB clocks registration only > if regname specified in device tree node. > In existing implementation, Q6 AHB clocks and lpass_aon clocks are > being registered exclusively and overlapping if both of them are > to be used.The regmap region used by Q6 AHB clocks is <0x03389000 0x24> Add space ^ > and of lpass_aon clocks is <0x03380000 0x30000>. > This is required to avoid such overlapping and to register > Q6 AHB clocks and lpass_aon clocks simultaneously. The commit text is still really hard to read and understand what's going on. Hopefully a binding update makes it clearer. It could also be clarified by indicating the compatible string so we know what "Q6 AHB" means or what "lpass_aon" means. Then we can grep the dtsi files for those compatibles to better understand what is intended. > > Fixes: 4ab43d171181 ("clk: qcom: Add lpass clock controller driver for SC7280") > Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> > Tested-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com> > --- > drivers/clk/qcom/lpassaudiocc-sc7280.c | 13 +++++++++---- > 1 file changed, 9 insertions(+), 4 deletions(-) > > diff --git a/drivers/clk/qcom/lpassaudiocc-sc7280.c b/drivers/clk/qcom/lpassaudiocc-sc7280.c > index 1339f92..8e2f433 100644 > --- a/drivers/clk/qcom/lpassaudiocc-sc7280.c > +++ b/drivers/clk/qcom/lpassaudiocc-sc7280.c > @@ -826,10 +829,12 @@ static int lpass_aon_cc_sc7280_probe(struct platform_device *pdev) > return ret; > > if (of_property_read_bool(pdev->dev.of_node, "qcom,adsp-pil-mode")) { > - lpass_audio_cc_sc7280_regmap_config.name = "cc"; > - desc = &lpass_cc_sc7280_desc; > - ret = qcom_cc_probe(pdev, desc); > - goto exit; > + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cc"); This should be index based and not reg-name based. Can you point me to the binding update for "qcom,sc7280-lpassaoncc" compatible that supports this? > + if (res) { > + lpass_audio_cc_sc7280_regmap_config.name = "cc"; > + desc = &lpass_cc_sc7280_desc; > + return qcom_cc_probe(pdev, desc); > + }
diff --git a/drivers/clk/qcom/lpassaudiocc-sc7280.c b/drivers/clk/qcom/lpassaudiocc-sc7280.c index 1339f92..8e2f433 100644 --- a/drivers/clk/qcom/lpassaudiocc-sc7280.c +++ b/drivers/clk/qcom/lpassaudiocc-sc7280.c @@ -660,6 +660,8 @@ static struct clk_regmap *lpass_aon_cc_sc7280_clocks[] = { [LPASS_AON_CC_TX_MCLK_2X_CLK] = &lpass_aon_cc_tx_mclk_2x_clk.clkr, [LPASS_AON_CC_TX_MCLK_CLK] = &lpass_aon_cc_tx_mclk_clk.clkr, [LPASS_AON_CC_TX_MCLK_RCG_CLK_SRC] = &lpass_aon_cc_tx_mclk_rcg_clk_src.clkr, + [LPASS_Q6_AHBM_CLK] = &lpass_q6ss_ahbm_clk.clkr, + [LPASS_Q6_AHBS_CLK] = &lpass_q6ss_ahbs_clk.clkr, }; static struct gdsc *lpass_aon_cc_sc7280_gdscs[] = { @@ -819,6 +821,7 @@ static int lpass_aon_cc_sc7280_probe(struct platform_device *pdev) { const struct qcom_cc_desc *desc; struct regmap *regmap; + struct resource *res; int ret; ret = lpass_audio_setup_runtime_pm(pdev); @@ -826,10 +829,12 @@ static int lpass_aon_cc_sc7280_probe(struct platform_device *pdev) return ret; if (of_property_read_bool(pdev->dev.of_node, "qcom,adsp-pil-mode")) { - lpass_audio_cc_sc7280_regmap_config.name = "cc"; - desc = &lpass_cc_sc7280_desc; - ret = qcom_cc_probe(pdev, desc); - goto exit; + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cc"); + if (res) { + lpass_audio_cc_sc7280_regmap_config.name = "cc"; + desc = &lpass_cc_sc7280_desc; + return qcom_cc_probe(pdev, desc); + } } lpass_audio_cc_sc7280_regmap_config.name = "lpasscc_aon";
Merge AHBM and AHBS clocks into lpass_aon clk_regmap structure as they are using same register space. Add conditional check for doing Q6 AHB clocks registration only if regname specified in device tree node. In existing implementation, Q6 AHB clocks and lpass_aon clocks are being registered exclusively and overlapping if both of them are to be used.The regmap region used by Q6 AHB clocks is <0x03389000 0x24> and of lpass_aon clocks is <0x03380000 0x30000>. This is required to avoid such overlapping and to register Q6 AHB clocks and lpass_aon clocks simultaneously. Fixes: 4ab43d171181 ("clk: qcom: Add lpass clock controller driver for SC7280") Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Tested-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com> --- drivers/clk/qcom/lpassaudiocc-sc7280.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-)