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[5/5] arm64: dts: qcom: sc8280xp: correct LPASS GPIO gpio-ranges

Message ID 20230203164854.390080-5-krzysztof.kozlowski@linaro.org
State Accepted
Commit 9c23d6848e43c25c4fe7bded4daf75569c360631
Headers show
Series [1/5] dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: correct GPIO name pattern | expand

Commit Message

Krzysztof Kozlowski Feb. 3, 2023, 4:48 p.m. UTC 
The SC8280XP LPASS pin controller has GPIOs 0-18, so correct the number
of GPIOs in gpio-ranges.

Fixes: c18773d162a6 ("arm64: dts: qcom: sc8280xp: add SoundWire and LPASS")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index c8509b1b040f..59545372595f 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -2645,7 +2645,7 @@  lpass_tlmm: pinctrl@33c0000 {
 			      <0 0x3550000 0x0 0x10000>;
 			gpio-controller;
 			#gpio-cells = <2>;
-			gpio-ranges = <&lpass_tlmm 0 0 18>;
+			gpio-ranges = <&lpass_tlmm 0 0 19>;
 
 			clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
 				 <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;