diff mbox series

[2/2] arm64: Initialize TLB memory if CMO_BY_VA_ONLY

Message ID 20230207162014.58664-3-paul.liu@linaro.org
State Superseded
Headers show
Series arm: cpu: Add optional CMOs by VA | expand

Commit Message

Paul Liu Feb. 7, 2023, 4:20 p.m. UTC
Memory used to hold the page tables is allocated from the top of RAM
with no prior initialization and could therefore hold invalid data. As
invalidate_dcache_all() will be called before the MMU has been
initialized and as that function relies indirectly on the page tables
when using CMO_BY_VA_ONLY, these must be in a valid state from their
allocation.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
Cc: Tom Rini <trini@konsulko.com>
---
 arch/arm/lib/cache.c | 9 +++++++++
 1 file changed, 9 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 1a589c7e2a..7a16015867 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -159,6 +159,15 @@  __weak int arm_reserve_mmu(void)
 	 */
 	gd->arch.tlb_allocated = gd->arch.tlb_addr;
 #endif
+
+	if (IS_ENABLED(CONFIG_CMO_BY_VA_ONLY)) {
+		/*
+		 * As invalidate_dcache_all() will be called before
+		 * mmu_setup(), we should make sure that the PTs are
+		 * already in a valid state.
+		 */
+		memset((void *)gd->arch.tlb_addr, 0, gd->arch.tlb_size);
+	}
 #endif
 
 	return 0;