| Message ID | 20230306231202.12223-4-quic_molvera@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | remoteproc: qcom_q6v5_pas: Add support for QDU1000/QRU1000 mpss | expand |
On 07/03/2023 00:11, Melody Olvera wrote: > This documents the compatible for the component used to boot the Do not use "This commit/patch". https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95 > MPSS on the QDU1000 and QRU1000 SoCs. > > The QDU1000 and QRU1000 mpss boot process now requires the specification > of an RMB register space to complete the handshake needed to start or > attach the mpss. > > Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> > --- > .../remoteproc/qcom,qdu1000-mpss-pas.yaml | 130 ++++++++++++++++++ > 1 file changed, 130 insertions(+) > create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-mpss-pas.yaml > > diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-mpss-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-mpss-pas.yaml > new file mode 100644 > index 000000000000..9cb4296c1fa6 > --- /dev/null > +++ b/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-mpss-pas.yaml > @@ -0,0 +1,130 @@ > +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/remoteproc/qcom,qdu1000-mpss-pas.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm QDU1000 Modem Peripheral Authentication Service > + > +maintainers: > + - Melody Olvera <quic_molvera@quicinc.com> > + > +description: > + Qualcomm QDU1000 SoC Peripheral Authentication Service loads and boots firmware > + on the Qualcomm DSP Hexagon core. > + > +properties: > + compatible: > + enum: > + - qcom,qdu1000-mpss-pas > + > + reg: > + maxItems: 2 You need to list the items instead (just like for clocks). > + > + clocks: > + items: > + - description: XO clock > + > + clock-names: > + items: > + - const: xo > + > + qcom,qmp: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: Reference to the AOSS side-channel message RAM. > + > + smd-edge: false > + > + firmware-name: > + $ref: /schemas/types.yaml#/definitions/string-array You can now drop the $ref. > + items: > + - description: Firmware name of the Hexagon core > + - description: Firmware name of the Hexagon Devicetree > + > + memory-region: > + items: > + - description: Memory region for main Firmware authentication > + - description: Memory region for Devicetree Firmware authentication > + - description: DSM Memory region > + > + interrupts: > + minItems: 6 > + > + interrupt-names: > + minItems: 6 > + > + interconnects: > + minItems: 1 maxItems instead > + > + power-domains: > + items: > + - description: CX power domain > + - description: MSS power domain > + > + power-domain-names: > + items: > + - const: cx > + - const: mss > + > +required: > + - compatible > + - reg memory-region (I fixed other bindings) > + > +allOf: > + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,rpmh.h> > + #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + #include <dt-bindings/mailbox/qcom-ipcc.h> > + #include <dt-bindings/power/qcom-rpmpd.h> > + > + remoteproc@4080000 { > + compatible = "qcom,qdu1000-mpss-pas"; > + reg = <0x4080000 0x4040>, > + <0x4180000 0x1000>; > + > + clocks = <&rpmhcc RPMH_CXO_CLK>; > + clock-names = "xo"; > + > + interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, > + <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, > + <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>, > + <&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>, > + <&smp2p_modem_in 3 IRQ_TYPE_EDGE_RISING>, > + <&smp2p_modem_in 7 IRQ_TYPE_EDGE_RISING>; > + interrupt-names = "wdog", "fatal", "ready", "handover", > + "stop-ack", "shutdown-ack"; > + > + memory-region = <&mpss_mem>, <&dtb_mpss_mem>, <&mpss_dsm_mem>; > + > + firmware-name = "qcom/qdu1000/modem.mbn", > + "qcom/qdu1000/modem_dtb.mbn"; > + > + power-domains = <&rpmhpd QDU1000_CX>, > + <&rpmhpd QDU1000_MSS>; > + power-domain-names = "cx", "mss"; > + > + interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>; > + > + qcom,qmp = <&aoss_qmp>; > + > + qcom,smem-states = <&smp2p_adsp_out 0>; > + qcom,smem-state-names = "stop"; > + > + glink-edge { > + interrupts-extended = <&ipcc IPCC_CLIENT_MPSS > + IPCC_MPROC_SIGNAL_GLINK_QMP > + IRQ_TYPE_EDGE_RISING>; > + mboxes = <&ipcc IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_GLINK_QMP>; > + > + label = "modem"; > + qcom,remote-pid = <2>; > + Drop stray blank line > + }; > + }; Best regards, Krzysztof
On 09/03/2023 09:33, Krzysztof Kozlowski wrote: > On 07/03/2023 00:11, Melody Olvera wrote: >> This documents the compatible for the component used to boot the > > Do not use "This commit/patch". > https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95 > >> MPSS on the QDU1000 and QRU1000 SoCs. >> >> The QDU1000 and QRU1000 mpss boot process now requires the specification >> of an RMB register space to complete the handshake needed to start or >> attach the mpss. >> >> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> >> --- >> .../remoteproc/qcom,qdu1000-mpss-pas.yaml | 130 ++++++++++++++++++ >> 1 file changed, 130 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-mpss-pas.yaml >> >> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-mpss-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-mpss-pas.yaml >> new file mode 100644 >> index 000000000000..9cb4296c1fa6 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-mpss-pas.yaml >> @@ -0,0 +1,130 @@ >> +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/remoteproc/qcom,qdu1000-mpss-pas.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm QDU1000 Modem Peripheral Authentication Service >> + >> +maintainers: >> + - Melody Olvera <quic_molvera@quicinc.com> >> + >> +description: >> + Qualcomm QDU1000 SoC Peripheral Authentication Service loads and boots firmware >> + on the Qualcomm DSP Hexagon core. >> + >> +properties: >> + compatible: >> + enum: >> + - qcom,qdu1000-mpss-pas >> + >> + reg: >> + maxItems: 2 > > You need to list the items instead (just like for clocks). > >> + >> + clocks: >> + items: >> + - description: XO clock >> + >> + clock-names: >> + items: >> + - const: xo >> + >> + qcom,qmp: >> + $ref: /schemas/types.yaml#/definitions/phandle >> + description: Reference to the AOSS side-channel message RAM. >> + >> + smd-edge: false >> + >> + firmware-name: >> + $ref: /schemas/types.yaml#/definitions/string-array > > You can now drop the $ref. > >> + items: >> + - description: Firmware name of the Hexagon core >> + - description: Firmware name of the Hexagon Devicetree >> + >> + memory-region: >> + items: >> + - description: Memory region for main Firmware authentication >> + - description: Memory region for Devicetree Firmware authentication >> + - description: DSM Memory region >> + >> + interrupts: >> + minItems: 6 >> + >> + interrupt-names: >> + minItems: 6 >> + >> + interconnects: >> + minItems: 1 > > maxItems instead Wait, I already commented on this... Some other comments also ignored. This is a friendly reminder during the review process. It seems my previous comments were not fully addressed. Maybe my feedback got lost between the quotes, maybe you just forgot to apply it. Please go back to the previous discussion and either implement all requested changes or keep discussing them. Thank you. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-mpss-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-mpss-pas.yaml new file mode 100644 index 000000000000..9cb4296c1fa6 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-mpss-pas.yaml @@ -0,0 +1,130 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,qdu1000-mpss-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QDU1000 Modem Peripheral Authentication Service + +maintainers: + - Melody Olvera <quic_molvera@quicinc.com> + +description: + Qualcomm QDU1000 SoC Peripheral Authentication Service loads and boots firmware + on the Qualcomm DSP Hexagon core. + +properties: + compatible: + enum: + - qcom,qdu1000-mpss-pas + + reg: + maxItems: 2 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string-array + items: + - description: Firmware name of the Hexagon core + - description: Firmware name of the Hexagon Devicetree + + memory-region: + items: + - description: Memory region for main Firmware authentication + - description: Memory region for Devicetree Firmware authentication + - description: DSM Memory region + + interrupts: + minItems: 6 + + interrupt-names: + minItems: 6 + + interconnects: + minItems: 1 + + power-domains: + items: + - description: CX power domain + - description: MSS power domain + + power-domain-names: + items: + - const: cx + - const: mss + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/mailbox/qcom-ipcc.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + remoteproc@4080000 { + compatible = "qcom,qdu1000-mpss-pas"; + reg = <0x4080000 0x4040>, + <0x4180000 0x1000>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, + <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_modem_in 3 IRQ_TYPE_EDGE_RISING>, + <&smp2p_modem_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", + "stop-ack", "shutdown-ack"; + + memory-region = <&mpss_mem>, <&dtb_mpss_mem>, <&mpss_dsm_mem>; + + firmware-name = "qcom/qdu1000/modem.mbn", + "qcom/qdu1000/modem_dtb.mbn"; + + power-domains = <&rpmhpd QDU1000_CX>, + <&rpmhpd QDU1000_MSS>; + power-domain-names = "cx", "mss"; + + interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>; + + qcom,qmp = <&aoss_qmp>; + + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_MPSS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "modem"; + qcom,remote-pid = <2>; + + }; + };
This documents the compatible for the component used to boot the MPSS on the QDU1000 and QRU1000 SoCs. The QDU1000 and QRU1000 mpss boot process now requires the specification of an RMB register space to complete the handshake needed to start or attach the mpss. Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> --- .../remoteproc/qcom,qdu1000-mpss-pas.yaml | 130 ++++++++++++++++++ 1 file changed, 130 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-mpss-pas.yaml