| Message ID | 1461078716-21369-3-git-send-email-sudeep.holla@arm.com |
|---|---|
| State | Superseded |
| Headers | show |
On 19 April 2016 at 17:11, Sudeep Holla <sudeep.holla@arm.com> wrote: > ACPI 6.0 introduced LPI(Low Power Idle) states that provides an alternate > method to describe processor idle states. > > LPI extensions leverages the processor container device(again introduced > in ACPI 6.0) allowing to express which parts of the system are affected > by a given LPI state. It defines the local power states for each node > in a hierarchical processor topology. The OSPM can use _LPI object to > select a local power state for each level of processor hierarchy in the > system. > > This patch adds LPI support on Juno. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> > Cc: Leif Lindholm <leif.lindholm@linaro.org> > Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> As for patch #1, I cannot review or test this. > --- > Platforms/ARM/Juno/AcpiTables/Dsdt.asl | 232 ++++++++++++++++++++++++++++++--- > 1 file changed, 213 insertions(+), 19 deletions(-) > > diff --git a/Platforms/ARM/Juno/AcpiTables/Dsdt.asl b/Platforms/ARM/Juno/AcpiTables/Dsdt.asl > index c80f46a4ce64..3247e6b12aa5 100644 > --- a/Platforms/ARM/Juno/AcpiTables/Dsdt.asl > +++ b/Platforms/ARM/Juno/AcpiTables/Dsdt.asl > @@ -19,29 +19,223 @@ DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_O > // > // A57x2-A53x4 Processor declaration > // > - Device(CPU0) { // A53-0: Cluster 1, Cpu 0 > - Name(_HID, "ACPI0007") > - Name(_UID, 0) > + Method (_OSC, 4, Serialized) { // _OSC: Operating System Capabilities > + CreateDWordField (Arg3, 0x00, STS0) > + CreateDWordField (Arg3, 0x04, CAP0) > + If ((Arg0 == ToUUID ("0811b06e-4a27-44f9-8d60-3cbbc22e7b48") /* Platform-wide Capabilities */)) { > + If (!(Arg1 == One)) { > + STS0 &= ~0x1F > + STS0 |= 0x0A > + } Else { > + If ((CAP0 & 0x100)) { > + CAP0 &= ~0x100 /* No support for OS Initiated LPI */ > + STS0 &= ~0x1F > + STS0 |= 0x12 > + } > + } > + } Else { > + STS0 &= ~0x1F > + STS0 |= 0x06 > + } > + Return (Arg3) > } > - Device(CPU1) { // A53-1: Cluster 1, Cpu 1 > - Name(_HID, "ACPI0007") > + Device (CLU0) { // Cluster0 state > + Name(_HID, "ACPI0010") > Name(_UID, 1) > + Name (_LPI, Package() { > + 0, // Version > + 0, // Level Index > + 1, // Count > + Package() { // Power Gating state for Cluster > + 2500, // Min residency (uS) > + 1150, // Wake latency (uS) > + 1, // Flags > + 1, // Arch Context Flags > + 100, //Residency Counter Frequency > + 0, // No Parent State > + 0x01000000, // Integer Entry method > + ResourceTemplate() { // Null Residency Counter > + Register (SystemMemory, 0, 0, 0, 0) > + }, > + ResourceTemplate() { // Null Usage Counter > + Register (SystemMemory, 0, 0, 0, 0) > + }, > + "CluPwrDn" > + }, > + }) > + Name(PLPI, Package() { > + 0, // Version > + 1, // Level Index > + 2, // Count > + Package() { // WFI for CPU > + 1, // Min residency (uS) > + 1, // Wake latency (uS) > + 1, // Flags > + 0, // Arch Context Flags > + 100, //Residency Counter Frequency > + 0, // No parent state > + ResourceTemplate () { > + // Register Entry method > + Register (FFixedHW, > + 0x20, // Bit Width > + 0x00, // Bit Offset > + 0xFFFFFFFF, // Address > + 0x03, // Access Size > + ) > + }, > + ResourceTemplate() { // Null Residency Counter > + Register (SystemMemory, 0, 0, 0, 0) > + }, > + ResourceTemplate() { // Null Usage Counter > + Register (SystemMemory, 0, 0, 0, 0) > + }, > + "WFI", > + }, > + Package() { // Power Gating state for CPU > + 150, // Min residency (uS) > + 350, // Wake latency (uS) > + 1, // Flags > + 1, // Arch Context Flags > + 100, //Residency Counter Frequency > + 1, // Parent node can be in any state > + ResourceTemplate () { > + // Register Entry method > + Register (FFixedHW, > + 0x20, // Bit Width > + 0x00, // Bit Offset > + 0x00010000, // Address > + 0x03, // Access Size > + ) > + }, > + ResourceTemplate() { // Null Residency Counter > + Register (SystemMemory, 0, 0, 0, 0) > + }, > + ResourceTemplate() { // Null Usage Counter > + Register (SystemMemory, 0, 0, 0, 0) > + }, > + "CorePwrDn" > + }, > + }) > + Device(CPU0) { // A57-0: Cluster 0, Cpu 0 > + Name(_HID, "ACPI0007") > + Name(_UID, 4) > + Method (_LPI, 0, NotSerialized) { > + return(PLPI) > + } > + } > + Device(CPU1) { // A57-1: Cluster 0, Cpu 1 > + Name(_HID, "ACPI0007") > + Name(_UID, 5) > + Method (_LPI, 0, NotSerialized) { > + return(PLPI) > + } > + } > } > - Device(CPU2) { // A53-2: Cluster 1, Cpu 2 > - Name(_HID, "ACPI0007") > + Device (CLU1) { // Cluster1 state > + Name(_HID, "ACPI0010") > Name(_UID, 2) > - } > - Device(CPU3) { // A53-3: Cluster 1, Cpu 3 > - Name(_HID, "ACPI0007") > - Name(_UID, 3) > - } > - Device(CPU4) { // A57-0: Cluster 0, Cpu 0 > - Name(_HID, "ACPI0007") > - Name(_UID, 4) > - } > - Device(CPU5) { // A57-1: Cluster 0, Cpu 1 > - Name(_HID, "ACPI0007") > - Name(_UID, 5) > + Name (_LPI, Package() { > + 0, // Version > + 0, // Level Index > + 1, // Count > + Package() { // Power Gating state for Cluster > + 2500, // Min residency (uS) > + 1150, // Wake latency (uS) > + 1, // Flags > + 1, // Arch Context Flags > + 100, //Residency Counter Frequency > + 0, // No Parent State > + 0x01000000, // Integer Entry method > + ResourceTemplate() { // Null Residency Counter > + Register (SystemMemory, 0, 0, 0, 0) > + }, > + ResourceTemplate() { // Null Usage Counter > + Register (SystemMemory, 0, 0, 0, 0) > + }, > + "CluPwrDn" > + }, > + }) > + Name(PLPI, Package() { > + 0, // Version > + 1, // Level Index > + 2, // Count > + Package() { // WFI for CPU > + 1, // Min residency (uS) > + 1, // Wake latency (uS) > + 1, // Flags > + 0, // Arch Context Flags > + 100, //Residency Counter Frequency > + 0, // No parent state > + ResourceTemplate () { > + // Register Entry method > + Register (FFixedHW, > + 0x20, // Bit Width > + 0x00, // Bit Offset > + 0xFFFFFFFF, // Address > + 0x03, // Access Size > + ) > + }, > + ResourceTemplate() { // Null Residency Counter > + Register (SystemMemory, 0, 0, 0, 0) > + }, > + ResourceTemplate() { // Null Usage Counter > + Register (SystemMemory, 0, 0, 0, 0) > + }, > + "WFI", > + }, > + Package() { // Power Gating state for CPU > + 150, // Min residency (uS) > + 350, // Wake latency (uS) > + 1, // Flags > + 1, // Arch Context Flags > + 100, //Residency Counter Frequency > + 1, // Parent node can be in any state > + ResourceTemplate () { > + // Register Entry method > + Register (FFixedHW, > + 0x20, // Bit Width > + 0x00, // Bit Offset > + 0x00010000, // Address > + 0x03, // Access Size > + ) > + }, > + ResourceTemplate() { // Null Residency Counter > + Register (SystemMemory, 0, 0, 0, 0) > + }, > + ResourceTemplate() { // Null Usage Counter > + Register (SystemMemory, 0, 0, 0, 0) > + }, > + "CorePwrDn" > + }, > + }) > + Device(CPU2) { // A53-0: Cluster 1, Cpu 0 > + Name(_HID, "ACPI0007") > + Name(_UID, 0) > + Method (_LPI, 0, NotSerialized) { > + return(PLPI) > + } > + } > + Device(CPU3) { // A53-1: Cluster 1, Cpu 1 > + Name(_HID, "ACPI0007") > + Name(_UID, 1) > + Method (_LPI, 0, NotSerialized) { > + return(PLPI) > + } > + } > + Device(CPU4) { // A53-2: Cluster 1, Cpu 2 > + Name(_HID, "ACPI0007") > + Name(_UID, 2) > + Method (_LPI, 0, NotSerialized) { > + return(PLPI) > + } > + } > + Device(CPU5) { // A53-3: Cluster 1, Cpu 3 > + Name(_HID, "ACPI0007") > + Name(_UID, 3) > + Method (_LPI, 0, NotSerialized) { > + return(PLPI) > + } > + } > } > > // > -- > 1.9.1 > _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
On 20/04/16 08:42, Ard Biesheuvel wrote: > On 19 April 2016 at 17:11, Sudeep Holla <sudeep.holla@arm.com> wrote: >> ACPI 6.0 introduced LPI(Low Power Idle) states that provides an alternate >> method to describe processor idle states. >> >> LPI extensions leverages the processor container device(again introduced >> in ACPI 6.0) allowing to express which parts of the system are affected >> by a given LPI state. It defines the local power states for each node >> in a hierarchical processor topology. The OSPM can use _LPI object to >> select a local power state for each level of processor hierarchy in the >> system. >> >> This patch adds LPI support on Juno. >> >> Contributed-under: TianoCore Contribution Agreement 1.0 >> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> >> Cc: Leif Lindholm <leif.lindholm@linaro.org> >> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> > > As for patch #1, I cannot review or test this. > This currently can't be tested with mainline kernel yet. The patches to support this are still under review -- Regards, Sudeep _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
On Wed, Apr 20, 2016 at 09:18:38AM +0100, Sudeep Holla wrote: > > > On 20/04/16 08:42, Ard Biesheuvel wrote: > >On 19 April 2016 at 17:11, Sudeep Holla <sudeep.holla@arm.com> wrote: > >>ACPI 6.0 introduced LPI(Low Power Idle) states that provides an alternate > >>method to describe processor idle states. > >> > >>LPI extensions leverages the processor container device(again introduced > >>in ACPI 6.0) allowing to express which parts of the system are affected > >>by a given LPI state. It defines the local power states for each node > >>in a hierarchical processor topology. The OSPM can use _LPI object to > >>select a local power state for each level of processor hierarchy in the > >>system. > >> > >>This patch adds LPI support on Juno. > >> > >>Contributed-under: TianoCore Contribution Agreement 1.0 > >>Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> > >>Cc: Leif Lindholm <leif.lindholm@linaro.org> > >>Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> > > > >As for patch #1, I cannot review or test this. > > This currently can't be tested with mainline kernel yet. > The patches to support this are still under review So, should it be merged anyway, or will that break something? Regardless, sounds like it should be split from the preceding two patches. / Leif _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
On 22/04/16 17:51, Leif Lindholm wrote: > On Wed, Apr 20, 2016 at 09:18:38AM +0100, Sudeep Holla wrote: >> >> >> On 20/04/16 08:42, Ard Biesheuvel wrote: >>> On 19 April 2016 at 17:11, Sudeep Holla <sudeep.holla@arm.com> wrote: >>>> ACPI 6.0 introduced LPI(Low Power Idle) states that provides an alternate >>>> method to describe processor idle states. >>>> >>>> LPI extensions leverages the processor container device(again introduced >>>> in ACPI 6.0) allowing to express which parts of the system are affected >>>> by a given LPI state. It defines the local power states for each node >>>> in a hierarchical processor topology. The OSPM can use _LPI object to >>>> select a local power state for each level of processor hierarchy in the >>>> system. >>>> >>>> This patch adds LPI support on Juno. >>>> >>>> Contributed-under: TianoCore Contribution Agreement 1.0 >>>> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> >>>> Cc: Leif Lindholm <leif.lindholm@linaro.org> >>>> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> >>> >>> As for patch #1, I cannot review or test this. >> >> This currently can't be tested with mainline kernel yet. >> The patches to support this are still under review > > So, should it be merged anyway, or will that break something? > Regardless, sounds like it should be split from the preceding two > patches. > There's no urgency as the Linux patches are still under review. But I posted just to point people at examples for _LPI tables. -- Regards, Sudeep _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
diff --git a/Platforms/ARM/Juno/AcpiTables/Dsdt.asl b/Platforms/ARM/Juno/AcpiTables/Dsdt.asl index c80f46a4ce64..3247e6b12aa5 100644 --- a/Platforms/ARM/Juno/AcpiTables/Dsdt.asl +++ b/Platforms/ARM/Juno/AcpiTables/Dsdt.asl @@ -19,29 +19,223 @@ DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_O // // A57x2-A53x4 Processor declaration // - Device(CPU0) { // A53-0: Cluster 1, Cpu 0 - Name(_HID, "ACPI0007") - Name(_UID, 0) + Method (_OSC, 4, Serialized) { // _OSC: Operating System Capabilities + CreateDWordField (Arg3, 0x00, STS0) + CreateDWordField (Arg3, 0x04, CAP0) + If ((Arg0 == ToUUID ("0811b06e-4a27-44f9-8d60-3cbbc22e7b48") /* Platform-wide Capabilities */)) { + If (!(Arg1 == One)) { + STS0 &= ~0x1F + STS0 |= 0x0A + } Else { + If ((CAP0 & 0x100)) { + CAP0 &= ~0x100 /* No support for OS Initiated LPI */ + STS0 &= ~0x1F + STS0 |= 0x12 + } + } + } Else { + STS0 &= ~0x1F + STS0 |= 0x06 + } + Return (Arg3) } - Device(CPU1) { // A53-1: Cluster 1, Cpu 1 - Name(_HID, "ACPI0007") + Device (CLU0) { // Cluster0 state + Name(_HID, "ACPI0010") Name(_UID, 1) + Name (_LPI, Package() { + 0, // Version + 0, // Level Index + 1, // Count + Package() { // Power Gating state for Cluster + 2500, // Min residency (uS) + 1150, // Wake latency (uS) + 1, // Flags + 1, // Arch Context Flags + 100, //Residency Counter Frequency + 0, // No Parent State + 0x01000000, // Integer Entry method + ResourceTemplate() { // Null Residency Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + ResourceTemplate() { // Null Usage Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + "CluPwrDn" + }, + }) + Name(PLPI, Package() { + 0, // Version + 1, // Level Index + 2, // Count + Package() { // WFI for CPU + 1, // Min residency (uS) + 1, // Wake latency (uS) + 1, // Flags + 0, // Arch Context Flags + 100, //Residency Counter Frequency + 0, // No parent state + ResourceTemplate () { + // Register Entry method + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0xFFFFFFFF, // Address + 0x03, // Access Size + ) + }, + ResourceTemplate() { // Null Residency Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + ResourceTemplate() { // Null Usage Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + "WFI", + }, + Package() { // Power Gating state for CPU + 150, // Min residency (uS) + 350, // Wake latency (uS) + 1, // Flags + 1, // Arch Context Flags + 100, //Residency Counter Frequency + 1, // Parent node can be in any state + ResourceTemplate () { + // Register Entry method + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x00010000, // Address + 0x03, // Access Size + ) + }, + ResourceTemplate() { // Null Residency Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + ResourceTemplate() { // Null Usage Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + "CorePwrDn" + }, + }) + Device(CPU0) { // A57-0: Cluster 0, Cpu 0 + Name(_HID, "ACPI0007") + Name(_UID, 4) + Method (_LPI, 0, NotSerialized) { + return(PLPI) + } + } + Device(CPU1) { // A57-1: Cluster 0, Cpu 1 + Name(_HID, "ACPI0007") + Name(_UID, 5) + Method (_LPI, 0, NotSerialized) { + return(PLPI) + } + } } - Device(CPU2) { // A53-2: Cluster 1, Cpu 2 - Name(_HID, "ACPI0007") + Device (CLU1) { // Cluster1 state + Name(_HID, "ACPI0010") Name(_UID, 2) - } - Device(CPU3) { // A53-3: Cluster 1, Cpu 3 - Name(_HID, "ACPI0007") - Name(_UID, 3) - } - Device(CPU4) { // A57-0: Cluster 0, Cpu 0 - Name(_HID, "ACPI0007") - Name(_UID, 4) - } - Device(CPU5) { // A57-1: Cluster 0, Cpu 1 - Name(_HID, "ACPI0007") - Name(_UID, 5) + Name (_LPI, Package() { + 0, // Version + 0, // Level Index + 1, // Count + Package() { // Power Gating state for Cluster + 2500, // Min residency (uS) + 1150, // Wake latency (uS) + 1, // Flags + 1, // Arch Context Flags + 100, //Residency Counter Frequency + 0, // No Parent State + 0x01000000, // Integer Entry method + ResourceTemplate() { // Null Residency Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + ResourceTemplate() { // Null Usage Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + "CluPwrDn" + }, + }) + Name(PLPI, Package() { + 0, // Version + 1, // Level Index + 2, // Count + Package() { // WFI for CPU + 1, // Min residency (uS) + 1, // Wake latency (uS) + 1, // Flags + 0, // Arch Context Flags + 100, //Residency Counter Frequency + 0, // No parent state + ResourceTemplate () { + // Register Entry method + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0xFFFFFFFF, // Address + 0x03, // Access Size + ) + }, + ResourceTemplate() { // Null Residency Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + ResourceTemplate() { // Null Usage Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + "WFI", + }, + Package() { // Power Gating state for CPU + 150, // Min residency (uS) + 350, // Wake latency (uS) + 1, // Flags + 1, // Arch Context Flags + 100, //Residency Counter Frequency + 1, // Parent node can be in any state + ResourceTemplate () { + // Register Entry method + Register (FFixedHW, + 0x20, // Bit Width + 0x00, // Bit Offset + 0x00010000, // Address + 0x03, // Access Size + ) + }, + ResourceTemplate() { // Null Residency Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + ResourceTemplate() { // Null Usage Counter + Register (SystemMemory, 0, 0, 0, 0) + }, + "CorePwrDn" + }, + }) + Device(CPU2) { // A53-0: Cluster 1, Cpu 0 + Name(_HID, "ACPI0007") + Name(_UID, 0) + Method (_LPI, 0, NotSerialized) { + return(PLPI) + } + } + Device(CPU3) { // A53-1: Cluster 1, Cpu 1 + Name(_HID, "ACPI0007") + Name(_UID, 1) + Method (_LPI, 0, NotSerialized) { + return(PLPI) + } + } + Device(CPU4) { // A53-2: Cluster 1, Cpu 2 + Name(_HID, "ACPI0007") + Name(_UID, 2) + Method (_LPI, 0, NotSerialized) { + return(PLPI) + } + } + Device(CPU5) { // A53-3: Cluster 1, Cpu 3 + Name(_HID, "ACPI0007") + Name(_UID, 3) + Method (_LPI, 0, NotSerialized) { + return(PLPI) + } + } } //
ACPI 6.0 introduced LPI(Low Power Idle) states that provides an alternate method to describe processor idle states. LPI extensions leverages the processor container device(again introduced in ACPI 6.0) allowing to express which parts of the system are affected by a given LPI state. It defines the local power states for each node in a hierarchical processor topology. The OSPM can use _LPI object to select a local power state for each level of processor hierarchy in the system. This patch adds LPI support on Juno. Contributed-under: TianoCore Contribution Agreement 1.0 Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> --- Platforms/ARM/Juno/AcpiTables/Dsdt.asl | 232 ++++++++++++++++++++++++++++++--- 1 file changed, 213 insertions(+), 19 deletions(-) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel