| Message ID | 20230324195555.3921170-10-markyacoub@google.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | None | expand |
Hi, On Fri, Mar 24, 2023 at 12:56 PM Mark Yacoub <markyacoub@chromium.org> wrote: > > From: Sean Paul <seanpaul@chromium.org> > > Add the register ranges required for HDCP key injection and > HDCP TrustZone interaction as described in the dt-bindings for the > sc7180 dp controller. > > Signed-off-by: Sean Paul <seanpaul@chromium.org> > Signed-off-by: Mark Yacoub <markyacoub@chromium.org> > > --- > Changes in v3: > -Split off into a new patch containing just the dts change (Stephen) > -Add hdcp compatible string (Stephen) > Changes in v4: > -Rebase on Bjorn's multi-dp patchset > Changes in v5: > -Put the tz register offsets in trogdor dtsi (Rob C) > Changes in v6: > -Rebased: Removed modifications in sc7180.dtsi as it's already upstream > Changes in v7: > -Change registers offset > > arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi > index 47f39c547c41a..63183ac9c3c48 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi > @@ -816,6 +816,14 @@ &mdss_dp { > status = "okay"; > pinctrl-names = "default"; > pinctrl-0 = <&dp_hot_plug_det>; > + > + reg = <0 0x0ae90000 0 0x200>, > + <0 0x0ae90200 0 0x200>, > + <0 0x0ae90400 0 0xc00>, > + <0 0x0ae91000 0 0x400>, > + <0 0x0ae91400 0 0x400>, > + <0 0x0aed1000 0 0x174>, > + <0 0x0aee1000 0 0x2c>; Reviewed-by: Douglas Anderson <dianders@chromium.org>
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi index 47f39c547c41a..63183ac9c3c48 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -816,6 +816,14 @@ &mdss_dp { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&dp_hot_plug_det>; + + reg = <0 0x0ae90000 0 0x200>, + <0 0x0ae90200 0 0x200>, + <0 0x0ae90400 0 0xc00>, + <0 0x0ae91000 0 0x400>, + <0 0x0ae91400 0 0x400>, + <0 0x0aed1000 0 0x174>, + <0 0x0aee1000 0 0x2c>; }; &mdss_dp_out {