@@ -547,7 +547,11 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
#
# PEI Phase modules
#
+!if $(DO_PSCI)
+ ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
+!else
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
+!endif
MdeModulePkg/Core/Pei/PeiMain.inf
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
<LibraryClasses>
@@ -248,7 +248,11 @@ READ_STATUS = TRUE
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
+!if $(DO_PSCI)
+ INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
+!else
INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
+!endif
INF MdeModulePkg/Core/Pei/PeiMain.inf
INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
INF AmdModulePkg/Iscp/IscpPei.inf
@@ -558,7 +558,11 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
#
# PEI Phase modules
#
+!if $(DO_PSCI)
+ ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
+!else
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
+!endif
MdeModulePkg/Core/Pei/PeiMain.inf
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
<LibraryClasses>
@@ -247,7 +247,11 @@ READ_STATUS = TRUE
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
+!if $(DO_PSCI)
+ INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
+!else
INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
+!endif
INF MdeModulePkg/Core/Pei/PeiMain.inf
INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
INF AmdModulePkg/Iscp/IscpPei.inf
When building the firmware with PSCI support, only the primary core enters UEFI, and the secondaries remain under the control of the EL3 firmware until the moment the OS invokes PSCI methords to release them. This means we can use the UP variant or PrePeiCore in this case. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> --- Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc | 4 ++++ Platforms/AMD/Styx/HuskyBoard/HuskyBoard.fdf | 4 ++++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 4 ++++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf | 4 ++++ 4 files changed, 16 insertions(+)