diff mbox series

[1/2] arm64: dts: qcom: sc7280: Add stream-id of qspi to iommus

Message ID 1680631400-28865-2-git-send-email-quic_vnivarth@quicinc.com
State Superseded
Headers show
Series [1/2] arm64: dts: qcom: sc7280: Add stream-id of qspi to iommus | expand

Commit Message

Vijaya Krishna Nivarthi April 4, 2023, 6:03 p.m. UTC
This is done as part of adding DMA support to qspi driver.

Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sc7280.dtsi | 1 +
 1 file changed, 1 insertion(+)

Comments

Vijaya Krishna Nivarthi April 12, 2023, 3:28 p.m. UTC | #1
Thank you very much for the review...


On 4/4/2023 11:49 PM, Krzysztof Kozlowski wrote:
> On 04/04/2023 20:03, Vijaya Krishna Nivarthi wrote:
>> This is done as part of adding DMA support to qspi driver.
>>
>> Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/sc7280.dtsi | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 5e6f9f4..9e05285 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -3434,6 +3434,7 @@
>>   		qspi: spi@88dc000 {
>>   			compatible = "qcom,sc7280-qspi", "qcom,qspi-v1";
>>   			reg = <0 0x088dc000 0 0x1000>;
>> +			iommus = <&apps_smmu 0x20 0x0>
> Does not look like you tested the DTS against bindings. Please run `make
> dtbs_check` (see Documentation/devicetree/bindings/writing-schema.rst
> for instructions).


Added changes to yaml file, ran the check and ensured it builds fine.


> Best regards,
> Krzysztof
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 5e6f9f4..9e05285 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3434,6 +3434,7 @@ 
 		qspi: spi@88dc000 {
 			compatible = "qcom,sc7280-qspi", "qcom,qspi-v1";
 			reg = <0 0x088dc000 0 0x1000>;
+			iommus = <&apps_smmu 0x20 0x0>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;