@@ -16,12 +16,6 @@
#size-cells = <2>;
clocks {
- bias_pll_ubi_nc_clk: bias-pll-ubi-nc-clk {
- compatible = "fixed-clock";
- clock-frequency = <353000000>;
- #clock-cells = <0>;
- };
-
sleep_clk: sleep-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -131,7 +125,6 @@
reg = <0x01800000 0x80000>;
clocks = <&xo_board_clk>,
<&sleep_clk>,
- <&bias_pll_ubi_nc_clk>,
<0>,
<0>,
<0>,
@@ -172,14 +165,14 @@
intc: interrupt-controller@b000000 {
compatible = "qcom,msm-qgic2";
reg = <0x0b000000 0x1000>, /* GICD */
- <0x0b002000 0x1000>, /* GICC */
+ <0x0b002000 0x2000>, /* GICC */
<0x0b001000 0x1000>, /* GICH */
- <0x0b004000 0x1000>; /* GICV */
+ <0x0b004000 0x2000>; /* GICV */
#address-cells = <1>;
#size-cells = <1>;
interrupt-controller;
#interrupt-cells = <3>;
- interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
ranges = <0 0x0b00c000 0x3000>;
v2m0: v2m@0 {
Drop the unused backup source bias_pll_ubi_nc_clk. Also, update the size of GICC and GICV region to 8kB and add target CPU encoding. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> --- Changes since V9: - Dropped the unused backup clock source bias_pll_ubi_nc_clk - Updated the size of GICC and GICV region to 8kB - Added target CPU encoding arch/arm64/boot/dts/qcom/ipq9574.dtsi | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-)