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[edk2,3/6] OvmfPkg: introduce PcdIch9AcpiPmBaseAddress

Message ID 1462840655-1802-4-git-send-email-lersek@redhat.com
State New
Headers show

Commit Message

Laszlo Ersek May 10, 2016, 12:37 a.m. UTC
According to the ICH9 spec, PMBASE "provides 128 bytes of I/O space for
ACPI, GPIO, and TCO logic. This is placed on a 128-byte boundary".

On the Q35 machine type of QEMU, our current PMBASE setting of 0xB000 is
the only thing that prevents us from lowering the base of the PCI IO port
aperture from 0xC000. (The base must be aligned to 0x1000 due to PCI
bridge requirements.)

By moving our PMBASE to 0x0600 (moving the register block to
0x0600..0x067F inclusive), which is also what SeaBIOS uses on Q35, we will
be able to lower the PCI IO port aperture base to 0x6000 (the next IO port
under it being taken by the "vmport" device, at fixed 0x5658), while
steering clear of other QEMU devices.

On PIIX4, freeing up the 0x1000 IO ports at 0xB000 wouldn't help much,
because the 0xA000 block right below it is occupied by unmovable devices
(see <https://bugzilla.redhat.com/show_bug.cgi?id=1333238#c19> for
details).

Doing this for Q35 only has two more benefits:
- It won't interfere with Xen guests,
- The Q35 machine type with the smallest version number is "pc-q35-2.4",
  which is guaranteed to have an ACPI generator. This matters because the
  ACPI tables (FACP, DSDT) have to reflect the PM base address that we
  program.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1333238
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>

---
 OvmfPkg/OvmfPkg.dec | 4 ++++
 1 file changed, 4 insertions(+)

-- 
1.8.3.1


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diff mbox

Patch

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index d30a40eb153c..a65bd01399be 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -77,10 +77,14 @@  [PcdsFixedAtBuild]
 
   ## This flag determines the Power Management Base Address of choice, written
   #  to PIIX4 function 3 offset 0x40-0x43 bits [15:6].
   gUefiOvmfPkgTokenSpaceGuid.PcdPiix4AcpiPmBaseAddress|0xB000|UINT16|5
 
+  ## This PCD determines the Power Management Base Address of choice, written
+  #  to ICH9 device 31 function 0, offset 0x40-0x43 bits [15:7].
+  gUefiOvmfPkgTokenSpaceGuid.PcdIch9AcpiPmBaseAddress|0x0600|UINT16|0x28
+
   ## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and
   #  LUNs are retrieved from the host during virtio-scsi setup.
   #  MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun
   #  possible devices. This can take extremely long, for example with
   #  MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit