diff mbox

[edk2,4/6] OvmfPkg: determine PMBA value dependent on host bridge device ID

Message ID 1462840655-1802-5-git-send-email-lersek@redhat.com
State New
Headers show

Commit Message

Laszlo Ersek May 10, 2016, 12:37 a.m. UTC 
In this patch, the AcpiTimerLib instances, ResetSystemLib, and PlatformPei
are modified together in order to keep VMs functional across a bisection:
they all must agree on the PMBA value used.

ResetSystemLib must not use dynamic PCDs. With SOURCE_DEBUG_ENABLE, it
gets linked into the debug agent, therefore the same restrictions apply to
it as to BaseRomAcpiTimerLib. Luckily, AcpiPmControl() is only used for
powering off the virtual machine, thus the extra cost of a PCI config
space read, compared to a PcdGet16(), should be negligible.

This is the patch that moves the PMBA to IO port 0x0600 on Q35 in
practice.

The ResetSystemLib change is easiest to verify with the "reset -s" command
in the UEFI shell (which goes through gRT->ResetSystem() and, in OVMF,
PcAtChipsetPkg/KbcResetDxe).

Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1333238
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>

---
 OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf    |  1 +
 OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.inf |  1 +
 OvmfPkg/Library/ResetSystemLib/ResetSystemLib.inf    |  1 +
 OvmfPkg/PlatformPei/PlatformPei.inf                  |  1 +
 OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c      | 11 +++++++---
 OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c   | 11 +++++++---
 OvmfPkg/Library/ResetSystemLib/ResetSystemLib.c      | 23 +++++++++++++++++---
 OvmfPkg/PlatformPei/Platform.c                       |  9 ++++++--
 8 files changed, 47 insertions(+), 11 deletions(-)

-- 
1.8.3.1


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diff mbox

Patch

diff --git a/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf b/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf
index d3f2180d61f3..eea659a2a20d 100644
--- a/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf
+++ b/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf
@@ -31,10 +31,11 @@  [Packages]
   MdePkg/MdePkg.dec
   OvmfPkg/OvmfPkg.dec
 
 [FixedPcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdPiix4AcpiPmBaseAddress
+  gUefiOvmfPkgTokenSpaceGuid.PcdIch9AcpiPmBaseAddress
 
 [LibraryClasses]
   BaseLib
   PciLib
   IoLib
diff --git a/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.inf b/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.inf
index 7a889155cb16..8f6f3969e861 100644
--- a/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.inf
+++ b/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.inf
@@ -30,10 +30,11 @@  [Packages]
   MdePkg/MdePkg.dec
   OvmfPkg/OvmfPkg.dec
 
 [FixedPcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdPiix4AcpiPmBaseAddress
+  gUefiOvmfPkgTokenSpaceGuid.PcdIch9AcpiPmBaseAddress
 
 [LibraryClasses]
   BaseLib
   PciLib
   IoLib
diff --git a/OvmfPkg/Library/ResetSystemLib/ResetSystemLib.inf b/OvmfPkg/Library/ResetSystemLib/ResetSystemLib.inf
index a09827899c14..17c6608c133e 100644
--- a/OvmfPkg/Library/ResetSystemLib/ResetSystemLib.inf
+++ b/OvmfPkg/Library/ResetSystemLib/ResetSystemLib.inf
@@ -38,5 +38,6 @@  [LibraryClasses]
   IoLib
   TimerLib
 
 [FixedPcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdPiix4AcpiPmBaseAddress
+  gUefiOvmfPkgTokenSpaceGuid.PcdIch9AcpiPmBaseAddress
diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf
index 981532d95bd3..658e87a5b387 100644
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -97,10 +97,11 @@  [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress
 
 [FixedPcd]
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
   gUefiOvmfPkgTokenSpaceGuid.PcdPiix4AcpiPmBaseAddress
+  gUefiOvmfPkgTokenSpaceGuid.PcdIch9AcpiPmBaseAddress
 
 [FeaturePcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
 
 [Ppis]
diff --git a/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c b/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c
index e85f18f8090d..7aa30bf8910b 100644
--- a/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c
+++ b/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c
@@ -36,25 +36,31 @@  AcpiTimerLibConstructor (
   VOID
   )
 {
   UINT16 HostBridgeDevId;
   UINTN Pmba;
+  UINT32 PmbaAndVal;
+  UINT32 PmbaOrVal;
   UINTN AcpiCtlReg;
   UINT8 AcpiEnBit;
 
   //
   // Query Host Bridge DID to determine platform type
   //
   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
   switch (HostBridgeDevId) {
     case INTEL_82441_DEVICE_ID:
       Pmba       = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
+      PmbaAndVal = ~(UINT32)PIIX4_PMBA_MASK;
+      PmbaOrVal  = FixedPcdGet16 (PcdPiix4AcpiPmBaseAddress);
       AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMREGMISC);
       AcpiEnBit  = PIIX4_PMREGMISC_PMIOSE;
       break;
     case INTEL_Q35_MCH_DEVICE_ID:
       Pmba       = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
+      PmbaAndVal = ~(UINT32)ICH9_PMBASE_MASK;
+      PmbaOrVal  = FixedPcdGet16 (PcdIch9AcpiPmBaseAddress);
       AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
       AcpiEnBit  = ICH9_ACPI_CNTL_ACPI_EN;
       break;
     default:
       DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
@@ -69,14 +75,13 @@  AcpiTimerLibConstructor (
   // Check to see if the Power Management Base Address is already enabled
   //
   if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
     //
     // If the Power Management Base Address is not programmed,
-    // then program the Power Management Base Address from a PCD.
+    // then program it now.
     //
-    PciAndThenOr32 (Pmba, ~(UINT32)PIIX4_PMBA_MASK,
-      FixedPcdGet16 (PcdPiix4AcpiPmBaseAddress));
+    PciAndThenOr32 (Pmba, PmbaAndVal, PmbaOrVal);
 
     //
     // Enable PMBA I/O port decodes
     //
     PciOr8 (AcpiCtlReg, AcpiEnBit);
diff --git a/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c b/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c
index 52eaaf0ad339..4e36d8492d90 100644
--- a/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c
+++ b/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c
@@ -34,25 +34,31 @@  AcpiTimerLibConstructor (
   VOID
   )
 {
   UINT16 HostBridgeDevId;
   UINTN Pmba;
+  UINT32 PmbaAndVal;
+  UINT32 PmbaOrVal;
   UINTN AcpiCtlReg;
   UINT8 AcpiEnBit;
 
   //
   // Query Host Bridge DID to determine platform type
   //
   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
   switch (HostBridgeDevId) {
     case INTEL_82441_DEVICE_ID:
       Pmba       = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
+      PmbaAndVal = ~(UINT32)PIIX4_PMBA_MASK;
+      PmbaOrVal  = FixedPcdGet16 (PcdPiix4AcpiPmBaseAddress);
       AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMREGMISC);
       AcpiEnBit  = PIIX4_PMREGMISC_PMIOSE;
       break;
     case INTEL_Q35_MCH_DEVICE_ID:
       Pmba       = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
+      PmbaAndVal = ~(UINT32)ICH9_PMBASE_MASK;
+      PmbaOrVal  = FixedPcdGet16 (PcdIch9AcpiPmBaseAddress);
       AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
       AcpiEnBit  = ICH9_ACPI_CNTL_ACPI_EN;
       break;
     default:
       DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
@@ -65,14 +71,13 @@  AcpiTimerLibConstructor (
   // Check to see if the Power Management Base Address is already enabled
   //
   if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
     //
     // If the Power Management Base Address is not programmed,
-    // then program the Power Management Base Address from a PCD.
+    // then program it now.
     //
-    PciAndThenOr32 (Pmba, ~(UINT32)PIIX4_PMBA_MASK,
-      FixedPcdGet16 (PcdPiix4AcpiPmBaseAddress));
+    PciAndThenOr32 (Pmba, PmbaAndVal, PmbaOrVal);
 
     //
     // Enable PMBA I/O port decodes
     //
     PciOr8 (AcpiCtlReg, AcpiEnBit);
diff --git a/OvmfPkg/Library/ResetSystemLib/ResetSystemLib.c b/OvmfPkg/Library/ResetSystemLib/ResetSystemLib.c
index a61060833e84..a4972e7e4c4a 100644
--- a/OvmfPkg/Library/ResetSystemLib/ResetSystemLib.c
+++ b/OvmfPkg/Library/ResetSystemLib/ResetSystemLib.c
@@ -17,21 +17,38 @@ 
 #include <Library/BaseLib.h>
 #include <Library/DebugLib.h>
 #include <Library/IoLib.h>
 #include <Library/PcdLib.h>
 #include <Library/TimerLib.h>
+#include <OvmfPlatforms.h>
 
 VOID
 AcpiPmControl (
   UINTN SuspendType
   )
 {
+  UINT16 AcpiPmBaseAddress;
+  UINT16 HostBridgeDevId;
+
   ASSERT (SuspendType < 6);
 
-  IoBitFieldWrite16 (FixedPcdGet16 (PcdPiix4AcpiPmBaseAddress) + 4, 10, 13,
-    (UINT16) SuspendType);
-  IoOr16 (FixedPcdGet16 (PcdPiix4AcpiPmBaseAddress) + 4, BIT13);
+  AcpiPmBaseAddress = 0;
+  HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
+  switch (HostBridgeDevId) {
+  case INTEL_82441_DEVICE_ID:
+    AcpiPmBaseAddress = FixedPcdGet16 (PcdPiix4AcpiPmBaseAddress);
+    break;
+  case INTEL_Q35_MCH_DEVICE_ID:
+    AcpiPmBaseAddress = FixedPcdGet16 (PcdIch9AcpiPmBaseAddress);
+    break;
+  default:
+    ASSERT (FALSE);
+    CpuDeadLoop ();
+  }
+
+  IoBitFieldWrite16 (AcpiPmBaseAddress + 4, 10, 13, (UINT16) SuspendType);
+  IoOr16 (AcpiPmBaseAddress + 4, BIT13);
   CpuDeadLoop ();
 }
 
 /**
   Calling this function causes a system-wide reset. This sets
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index a40be990696b..1eec581fae64 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -361,10 +361,12 @@  MiscInitialization (
   VOID
   )
 {
   UINTN  PmCmd;
   UINTN  Pmba;
+  UINT32 PmbaAndVal;
+  UINT32 PmbaOrVal;
   UINTN  AcpiCtlReg;
   UINT8  AcpiEnBit;
 
   //
   // Disable A20 Mask
@@ -383,16 +385,20 @@  MiscInitialization (
   //
   switch (mHostBridgeDevId) {
     case INTEL_82441_DEVICE_ID:
       PmCmd      = POWER_MGMT_REGISTER_PIIX4 (PCI_COMMAND_OFFSET);
       Pmba       = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
+      PmbaAndVal = ~(UINT32)PIIX4_PMBA_MASK;
+      PmbaOrVal  = FixedPcdGet16 (PcdPiix4AcpiPmBaseAddress);
       AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMREGMISC);
       AcpiEnBit  = PIIX4_PMREGMISC_PMIOSE;
       break;
     case INTEL_Q35_MCH_DEVICE_ID:
       PmCmd      = POWER_MGMT_REGISTER_Q35 (PCI_COMMAND_OFFSET);
       Pmba       = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
+      PmbaAndVal = ~(UINT32)ICH9_PMBASE_MASK;
+      PmbaOrVal  = FixedPcdGet16 (PcdIch9AcpiPmBaseAddress);
       AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
       AcpiEnBit  = ICH9_ACPI_CNTL_ACPI_EN;
       break;
     default:
       DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
@@ -410,12 +416,11 @@  MiscInitialization (
   if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
     //
     // The PEI phase should be exited with fully accessibe ACPI PM IO space:
     // 1. set PMBA
     //
-    PciAndThenOr32 (Pmba, ~(UINT32)PIIX4_PMBA_MASK,
-      FixedPcdGet16 (PcdPiix4AcpiPmBaseAddress));
+    PciAndThenOr32 (Pmba, PmbaAndVal, PmbaOrVal);
 
     //
     // 2. set PCICMD/IOSE
     //
     PciOr8 (PmCmd, EFI_PCI_COMMAND_IO_SPACE);