| Message ID | 20230420092128.6073-4-wsa+renesas@sang-engineering.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [RFT,v2,1/3] drivers/thermal/rcar_gen3_thermal: introduce 'info' structure | expand |
Hello Wolfram-san, > From: Wolfram Sang, Sent: Thursday, April 20, 2023 6:21 PM > > The registers are differently named and at different offsets, but their > functionality is the same as for Gen3. > > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> > Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Thank you for the patch! > --- > drivers/thermal/rcar_gen3_thermal.c | 44 +++++++++++++++++++++++++++-- > 1 file changed, 42 insertions(+), 2 deletions(-) > > diff --git a/drivers/thermal/rcar_gen3_thermal.c b/drivers/thermal/rcar_gen3_thermal.c > index 39b382ee08c8..e01e27903e44 100644 > --- a/drivers/thermal/rcar_gen3_thermal.c > +++ b/drivers/thermal/rcar_gen3_thermal.c > @@ -35,6 +35,12 @@ > #define REG_GEN3_PTAT2 0x60 > #define REG_GEN3_PTAT3 0x64 > #define REG_GEN3_THSCP 0x68 > +#define REG_GEN4_THSFMON00 0x180 > +#define REG_GEN4_THSFMON01 0x184 > +#define REG_GEN4_THSFMON02 0x188 > +#define REG_GEN4_THSFMON15 0x1BC > +#define REG_GEN4_THSFMON16 0x1C0 > +#define REG_GEN4_THSFMON17 0x1C4 > > /* IRQ{STR,MSK,EN} bits */ > #define IRQ_TEMP1 BIT(0) > @@ -55,6 +61,7 @@ > > #define MCELSIUS(temp) ((temp) * 1000) > #define GEN3_FUSE_MASK 0xFFF > +#define GEN4_FUSE_MASK 0xFFF > > #define TSC_MAX_NUM 5 > > @@ -272,6 +279,34 @@ static void rcar_gen3_thermal_read_fuses_gen3(struct rcar_gen3_thermal_priv *pri > } > } > > +static void rcar_gen3_thermal_read_fuses_gen4(struct rcar_gen3_thermal_priv *priv) > +{ > + unsigned int i; > + > + /* > + * Set the pseudo calibration points with fused values. > + * PTAT is shared between all TSCs but only fused for the first > + * TSC while THCODEs are fused for each TSC. > + */ > + priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON01) & > + GEN4_FUSE_MASK; s/REG_GEN4_THSFMON01/REG_GEN4_THSFMON16/ According to the table in 13.3.3.4 of R-Car {S4,V4H} Hardware manuals: PTAT1 PTAT_PF_U_SR1 bits (of THSFMON16 register) PTAT2 PTAT_PF_R_SR1 bits (of THSFMON17 register) PTAT3 PTAT_PF_L_SR1 bits (of THSFMON15 register) THCODE1 THCODE_U_SR1 bits (of THSFMON01 register) THCODE2 THCODE_R_SR1 bits (of THSFMON02 register) THCODE3 THCODE_L_SR1 bits (of THSFMON00 register) Otherwise, calculated the temperature value was incorrect. > + priv->ptat[1] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON02) & > + GEN4_FUSE_MASK; s/REG_GEN4_THSFMON02/THSFMON17/ > + priv->ptat[2] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON00) & > + GEN4_FUSE_MASK; s/REG_GEN4_THSFMON00/THSFMON15/ > + > + for (i = 0; i < priv->num_tscs; i++) { > + struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i]; > + > + tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON16) & > + GEN4_FUSE_MASK; s/REG_GEN4_THSFMON16/THSFMON01/ > + tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON17) & > + GEN4_FUSE_MASK; s/REG_GEN4_THSFMON17/THSFMON02/ > + tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON15) & > + GEN4_FUSE_MASK; s/REG_GEN4_THSFMON15/THSFMON00/ Best regards, Yoshihiro Shimoda > + } > +} > + > static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv) > { > unsigned int i; > @@ -343,6 +378,11 @@ static const struct rcar_thermal_info rcar_gen3_thermal_info = { > .read_fuses = rcar_gen3_thermal_read_fuses_gen3, > }; > > +static const struct rcar_thermal_info rcar_gen4_thermal_info = { > + .ths_tj_1 = 126, > + .read_fuses = rcar_gen3_thermal_read_fuses_gen4, > +}; > + > static const struct of_device_id rcar_gen3_thermal_dt_ids[] = { > { > .compatible = "renesas,r8a774a1-thermal", > @@ -382,11 +422,11 @@ static const struct of_device_id rcar_gen3_thermal_dt_ids[] = { > }, > { > .compatible = "renesas,r8a779f0-thermal", > - .data = &rcar_gen3_thermal_info, > + .data = &rcar_gen4_thermal_info, > }, > { > .compatible = "renesas,r8a779g0-thermal", > - .data = &rcar_gen3_thermal_info, > + .data = &rcar_gen4_thermal_info, > }, > {}, > }; > -- > 2.30.2
> > + priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON01) & > > + GEN4_FUSE_MASK; > > s/REG_GEN4_THSFMON01/REG_GEN4_THSFMON16/ > > According to the table in 13.3.3.4 of R-Car {S4,V4H} Hardware manuals: > > PTAT1 PTAT_PF_U_SR1 bits (of THSFMON16 register) > PTAT2 PTAT_PF_R_SR1 bits (of THSFMON17 register) > PTAT3 PTAT_PF_L_SR1 bits (of THSFMON15 register) > THCODE1 THCODE_U_SR1 bits (of THSFMON01 register) > THCODE2 THCODE_R_SR1 bits (of THSFMON02 register) > THCODE3 THCODE_L_SR1 bits (of THSFMON00 register) Oops, you are right, I mixed the two blocks :/ I'll send a fixed version right away!
diff --git a/drivers/thermal/rcar_gen3_thermal.c b/drivers/thermal/rcar_gen3_thermal.c index 39b382ee08c8..e01e27903e44 100644 --- a/drivers/thermal/rcar_gen3_thermal.c +++ b/drivers/thermal/rcar_gen3_thermal.c @@ -35,6 +35,12 @@ #define REG_GEN3_PTAT2 0x60 #define REG_GEN3_PTAT3 0x64 #define REG_GEN3_THSCP 0x68 +#define REG_GEN4_THSFMON00 0x180 +#define REG_GEN4_THSFMON01 0x184 +#define REG_GEN4_THSFMON02 0x188 +#define REG_GEN4_THSFMON15 0x1BC +#define REG_GEN4_THSFMON16 0x1C0 +#define REG_GEN4_THSFMON17 0x1C4 /* IRQ{STR,MSK,EN} bits */ #define IRQ_TEMP1 BIT(0) @@ -55,6 +61,7 @@ #define MCELSIUS(temp) ((temp) * 1000) #define GEN3_FUSE_MASK 0xFFF +#define GEN4_FUSE_MASK 0xFFF #define TSC_MAX_NUM 5 @@ -272,6 +279,34 @@ static void rcar_gen3_thermal_read_fuses_gen3(struct rcar_gen3_thermal_priv *pri } } +static void rcar_gen3_thermal_read_fuses_gen4(struct rcar_gen3_thermal_priv *priv) +{ + unsigned int i; + + /* + * Set the pseudo calibration points with fused values. + * PTAT is shared between all TSCs but only fused for the first + * TSC while THCODEs are fused for each TSC. + */ + priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON01) & + GEN4_FUSE_MASK; + priv->ptat[1] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON02) & + GEN4_FUSE_MASK; + priv->ptat[2] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON00) & + GEN4_FUSE_MASK; + + for (i = 0; i < priv->num_tscs; i++) { + struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i]; + + tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON16) & + GEN4_FUSE_MASK; + tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON17) & + GEN4_FUSE_MASK; + tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON15) & + GEN4_FUSE_MASK; + } +} + static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv) { unsigned int i; @@ -343,6 +378,11 @@ static const struct rcar_thermal_info rcar_gen3_thermal_info = { .read_fuses = rcar_gen3_thermal_read_fuses_gen3, }; +static const struct rcar_thermal_info rcar_gen4_thermal_info = { + .ths_tj_1 = 126, + .read_fuses = rcar_gen3_thermal_read_fuses_gen4, +}; + static const struct of_device_id rcar_gen3_thermal_dt_ids[] = { { .compatible = "renesas,r8a774a1-thermal", @@ -382,11 +422,11 @@ static const struct of_device_id rcar_gen3_thermal_dt_ids[] = { }, { .compatible = "renesas,r8a779f0-thermal", - .data = &rcar_gen3_thermal_info, + .data = &rcar_gen4_thermal_info, }, { .compatible = "renesas,r8a779g0-thermal", - .data = &rcar_gen3_thermal_info, + .data = &rcar_gen4_thermal_info, }, {}, };