| Message ID | 20230425084010.15581-3-quic_devipriy@quicinc.com |
|---|---|
| State | Accepted |
| Commit | 3f2c154e1b3d31fd13bac4bfbb632db3168dfdb6 |
| Headers | show |
| Series | Incremental patches on minimal boot support | expand |
diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml index afc68eb9d7cc..944a0ea79cd6 100644 --- a/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml @@ -7,6 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Global Clock & Reset Controller on IPQ9574 maintainers: + - Bjorn Andersson <andersson@kernel.org> - Anusha Rao <quic_anusha@quicinc.com> description: |
Add Bjorn andersson to the maintainer's list. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> --- Changes in V3: - "Drop bias_pll_ubi_nc_clk input": Reverted the changes as <0> entry is added in place of bias_pll_ubi_nc_clk in the DT. Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml | 1 + 1 file changed, 1 insertion(+)