[1/2] ARM: dts: BCM5301X: Relicense Rafał's code to the GPL 2.0+ / MIT

Message ID	20230503121611.1629-1-zajec5@gmail.com
State	New
Headers	show Return-Path: <devicetree-owner@vger.kernel.org> From: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= <zajec5@gmail.com> To: Florian Fainelli <f.fainelli@gmail.com> Cc: Hauke Mehrtens <hauke@hauke-m.de>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzk@kernel.org>, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= <rafal@milecki.pl> Subject: [PATCH 1/2] =?utf-8?q?ARM=3A_dts=3A_BCM5301X=3A_Relicense_Rafa?= =?utf-8?q?=C5=82=27s_code_to_the_GPL_2=2E0+_/_MIT?= Date: Wed, 3 May 2023 14:16:10 +0200 Message-Id: <20230503121611.1629-1-zajec5@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	[1/2] ARM: dts: BCM5301X: Relicense Rafał's code to the GPL 2.0+ / MIT \| expand [1/2] ARM: dts: BCM5301X: Relicense Rafał's code to the GPL 2.0+ / MIT

diff --git a/MAINTAINERS b/MAINTAINERS index a81ba8328704..35c2fe651081 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4001,6 +4001,7 @@ M: Rafał Miłecki <zajec5@gmail.com> R: Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com> L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained +F: arch/arm/boot/dts/bcm-ns.dtsi F: arch/arm/boot/dts/bcm470* F: arch/arm/boot/dts/bcm5301* F: arch/arm/boot/dts/bcm953012* diff --git a/arch/arm/boot/dts/bcm-ns.dtsi b/arch/arm/boot/dts/bcm-ns.dtsi new file mode 100644 index 000000000000..21d672aba75a --- /dev/null +++ b/arch/arm/boot/dts/bcm-ns.dtsi @@ -0,0 +1,202 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include <dt-bindings/clock/bcm-nsp.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + axi@18000000 { + compatible = "brcm,bus-axi"; + reg = <0x18000000 0x1000>; + ranges = <0x00000000 0x18000000 0x00100000>; + #address-cells = <1>; + #size-cells = <1>; + + chipcommon: chipcommon@0 { + reg = <0x00000000 0x1000>; + + gpio-controller; + #gpio-cells = <2>; + }; + + pcie0: pcie@12000 { + reg = <0x00012000 0x1000>; + }; + + pcie1: pcie@13000 { + reg = <0x00013000 0x1000>; + }; + + usb2: usb2@21000 { + reg = <0x00021000 0x1000>; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + interrupt-parent = <&gic>; + + ehci: usb@21000 { + #usb-cells = <0>; + + compatible = "generic-ehci"; + reg = <0x00021000 0x1000>; + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usb2_phy>; + + #address-cells = <1>; + #size-cells = <0>; + + ehci_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + ehci_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; + }; + + ohci: usb@22000 { + #usb-cells = <0>; + + compatible = "generic-ohci"; + reg = <0x00022000 0x1000>; + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; + + #address-cells = <1>; + #size-cells = <0>; + + ohci_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + ohci_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; + }; + }; + + usb3: usb3@23000 { + reg = <0x00023000 0x1000>; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + interrupt-parent = <&gic>; + + xhci: usb@23000 { + #usb-cells = <0>; + + compatible = "generic-xhci"; + reg = <0x00023000 0x1000>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usb3_phy>; + phy-names = "usb"; + + #address-cells = <1>; + #size-cells = <0>; + + xhci_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + }; + }; + }; + + mdio: mdio@18003000 { + compatible = "brcm,iproc-mdio"; + reg = <0x18003000 0x8>; + #size-cells = <0>; + #address-cells = <1>; + }; + + dmu-bus@1800c000 { + compatible = "simple-bus"; + ranges = <0 0x1800c000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + cru-bus@100 { + compatible = "brcm,ns-cru", "simple-mfd"; + reg = <0x100 0x1a4>; + ranges; + #address-cells = <1>; + #size-cells = <1>; + + usb2_phy: phy@164 { + compatible = "brcm,ns-usb2-phy"; + reg = <0x164 0x4>; + brcm,syscon-clkset = <&cru_clkset>; + clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>; + clock-names = "phy-ref-clk"; + #phy-cells = <0>; + }; + + cru_clkset: syscon@180 { + compatible = "brcm,cru-clkset", "syscon"; + reg = <0x180 0x4>; + }; + + pinctrl: pinctrl@1c0 { + compatible = "brcm,bcm4708-pinmux"; + reg = <0x1c0 0x24>; + reg-names = "cru_gpio_control"; + + spi-pins { + groups = "spi_grp"; + function = "spi"; + }; + + pinmux_i2c: i2c-pins { + groups = "i2c_grp"; + function = "i2c"; + }; + + pinmux_pwm: pwm-pins { + groups = "pwm0_grp", "pwm1_grp", + "pwm2_grp", "pwm3_grp"; + function = "pwm"; + }; + + pinmux_uart1: uart1-pins { + groups = "uart1_grp"; + function = "uart1"; + }; + }; + + thermal: thermal@2c0 { + compatible = "brcm,ns-thermal"; + reg = <0x2c0 0x10>; + #thermal-sensor-cells = <0>; + }; + }; + }; + + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <1000>; + coefficients = <(-556) 418000>; + thermal-sensors = <&thermal>; + + trips { + cpu-crit { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi index 5fc1b847f4aa..2aa3a9f09641 100644 --- a/arch/arm/boot/dts/bcm5301x.dtsi +++ b/arch/arm/boot/dts/bcm5301x.dtsi @@ -8,11 +8,7 @@ * Licensed under the GNU/GPL. See COPYING for details. */ -#include <dt-bindings/clock/bcm-nsp.h> -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> +#include "bcm-ns.dtsi" / { #address-cells = <1>; @@ -149,12 +145,6 @@ periph_clk: periph_clk { }; axi@18000000 { - compatible = "brcm,bus-axi"; - reg = <0x18000000 0x1000>; - ranges = <0x00000000 0x18000000 0x00100000>; - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <1>; interrupt-map-mask = <0x000fffff 0xffff>; interrupt-map = @@ -228,108 +218,15 @@ axi@18000000 { <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; - chipcommon: chipcommon@0 { - reg = <0x00000000 0x1000>; - - gpio-controller; - #gpio-cells = <2>; + chipcommon@0 { interrupt-controller; #interrupt-cells = <2>; }; - pcie0: pcie@12000 { - reg = <0x00012000 0x1000>; - }; - - pcie1: pcie@13000 { - reg = <0x00013000 0x1000>; - }; - pcie2: pcie@14000 { reg = <0x00014000 0x1000>; }; - usb2: usb2@21000 { - reg = <0x00021000 0x1000>; - - #address-cells = <1>; - #size-cells = <1>; - ranges; - - interrupt-parent = <&gic>; - - ehci: usb@21000 { - #usb-cells = <0>; - - compatible = "generic-ehci"; - reg = <0x00021000 0x1000>; - interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; - phys = <&usb2_phy>; - - #address-cells = <1>; - #size-cells = <0>; - - ehci_port1: port@1 { - reg = <1>; - #trigger-source-cells = <0>; - }; - - ehci_port2: port@2 { - reg = <2>; - #trigger-source-cells = <0>; - }; - }; - - ohci: usb@22000 { - #usb-cells = <0>; - - compatible = "generic-ohci"; - reg = <0x00022000 0x1000>; - interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; - - #address-cells = <1>; - #size-cells = <0>; - - ohci_port1: port@1 { - reg = <1>; - #trigger-source-cells = <0>; - }; - - ohci_port2: port@2 { - reg = <2>; - #trigger-source-cells = <0>; - }; - }; - }; - - usb3: usb3@23000 { - reg = <0x00023000 0x1000>; - - #address-cells = <1>; - #size-cells = <1>; - ranges; - - interrupt-parent = <&gic>; - - xhci: usb@23000 { - #usb-cells = <0>; - - compatible = "generic-xhci"; - reg = <0x00023000 0x1000>; - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; - phys = <&usb3_phy>; - phy-names = "usb"; - - #address-cells = <1>; - #size-cells = <0>; - - xhci_port1: port@1 { - reg = <1>; - #trigger-source-cells = <0>; - }; - }; - }; - gmac0: ethernet@24000 { reg = <0x24000 0x800>; }; @@ -355,13 +252,6 @@ pwm: pwm@18002000 { status = "disabled"; }; - mdio: mdio@18003000 { - compatible = "brcm,iproc-mdio"; - reg = <0x18003000 0x8>; - #size-cells = <0>; - #address-cells = <1>; - }; - mdio-mux@18003000 { compatible = "mdio-mux-mmioreg", "mdio-mux"; mdio-parent-bus = <&mdio>; @@ -409,18 +299,7 @@ i2c0: i2c@18009000 { }; dmu-bus@1800c000 { - compatible = "simple-bus"; - ranges = <0 0x1800c000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - cru-bus@100 { - compatible = "brcm,ns-cru", "simple-mfd"; - reg = <0x100 0x1a4>; - ranges; - #address-cells = <1>; - #size-cells = <1>; - lcpll0: clock-controller@100 { #clock-cells = <1>; compatible = "brcm,nsp-lcpll0"; @@ -440,53 +319,6 @@ genpll: clock-controller@140 { "usbclk", "iprocfast", "sata1", "sata2"; }; - - usb2_phy: phy@164 { - compatible = "brcm,ns-usb2-phy"; - reg = <0x164 0x4>; - brcm,syscon-clkset = <&cru_clkset>; - clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>; - clock-names = "phy-ref-clk"; - #phy-cells = <0>; - }; - - cru_clkset: syscon@180 { - compatible = "brcm,cru-clkset", "syscon"; - reg = <0x180 0x4>; - }; - - pinctrl: pinctrl@1c0 { - compatible = "brcm,bcm4708-pinmux"; - reg = <0x1c0 0x24>; - reg-names = "cru_gpio_control"; - - spi-pins { - groups = "spi_grp"; - function = "spi"; - }; - - pinmux_i2c: i2c-pins { - groups = "i2c_grp"; - function = "i2c"; - }; - - pinmux_pwm: pwm-pins { - groups = "pwm0_grp", "pwm1_grp", - "pwm2_grp", "pwm3_grp"; - function = "pwm"; - }; - - pinmux_uart1: uart1-pins { - groups = "uart1_grp"; - function = "uart1"; - }; - }; - - thermal: thermal@2c0 { - compatible = "brcm,ns-thermal"; - reg = <0x2c0 0x10>; - #thermal-sensor-cells = <0>; - }; }; }; @@ -558,24 +390,4 @@ partitions { }; }; }; - - thermal-zones { - cpu_thermal: cpu-thermal { - polling-delay-passive = <0>; - polling-delay = <1000>; - coefficients = <(-556) 418000>; - thermal-sensors = <&thermal>; - - trips { - cpu-crit { - temperature = <125000>; - hysteresis = <0>; - type = "critical"; - }; - }; - - cooling-maps { - }; - }; - }; };

[1/2] ARM: dts: BCM5301X: Relicense Rafał's code to the GPL 2.0+ / MIT

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