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[2/3] arm64: dts: qcom: msm8996: correct MMCC clocks order

Message ID 20230507174516.264936-2-krzysztof.kozlowski@linaro.org
State Accepted
Commit 3e8188b4b6c76bfa5c5389384bea2719a1271327
Headers show
Series None | expand

Commit Message

Krzysztof Kozlowski May 7, 2023, 5:45 p.m. UTC
Re-order the clocks for MMCC clock controller node to match the bindings (Linux
driver takes by name):

  msm8996-mtp.dtb: clock-controller@8c0000: clock-names:1: 'gpll0' was expected
  msm8996-mtp.dtb: clock-controller@8c0000: clock-names:2: 'gcc_mmss_noc_cfg_ahb_clk' was expected

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index fe9e1cb12a73..718007cfb10e 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -939,16 +939,16 @@  mmcc: clock-controller@8c0000 {
 			#power-domain-cells = <1>;
 			reg = <0x008c0000 0x40000>;
 			clocks = <&xo_board>,
-				 <&gcc GCC_MMSS_NOC_CFG_AHB_CLK>,
 				 <&gcc GPLL0>,
+				 <&gcc GCC_MMSS_NOC_CFG_AHB_CLK>,
 				 <&dsi0_phy 1>,
 				 <&dsi0_phy 0>,
 				 <&dsi1_phy 1>,
 				 <&dsi1_phy 0>,
 				 <&hdmi_phy>;
 			clock-names = "xo",
-				      "gcc_mmss_noc_cfg_ahb_clk",
 				      "gpll0",
+				      "gcc_mmss_noc_cfg_ahb_clk",
 				      "dsi0pll",
 				      "dsi0pllbyte",
 				      "dsi1pll",