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[2/2] arm64: dts: qcom: ipq9574: Enable crypto nodes

Message ID 20230512090134.9811-3-quic_anusha@quicinc.com
State Superseded
Headers show
Series ] Enable crypto for ipq9574 | expand

Commit Message

Anusha Canchi May 12, 2023, 9:01 a.m. UTC
Enable crypto support for ipq9574.

Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
---
 arch/arm64/boot/dts/qcom/ipq9574.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

Comments

Anusha Canchi May 15, 2023, 7:28 a.m. UTC | #1
On 5/12/2023 2:52 PM, Krzysztof Kozlowski wrote:
> On 12/05/2023 11:01, Anusha Rao wrote:
>> Enable crypto support for ipq9574.
>>
>> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/ipq9574.dtsi | 20 ++++++++++++++++++++
>>   1 file changed, 20 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> index fea15f3cf910..3cda5aa8d03c 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> @@ -123,6 +123,26 @@
>>   			clock-names = "core";
>>   		};
>>   
>> +		cryptobam: dma-controller@704000 {
>> +			compatible = "qcom,bam-v1.7.0";
>> +			reg = <0x00704000 0x20000>;
>> +			interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
>> +			#dma-cells = <1>;
>> +			qcom,ee = <1>;
>> +			qcom,controlled-remotely;
>> +		};
>> +
>> +		crypto: crypto@73a000 {
>> +			compatible = "qcom,crypto-v5.1";
> This compatible is deprecated. Take a look at the bindings - I think you
> miss bindings for your SoC, which you should then use here.
Okay, will address in next spin.

Thanks,
Anusha
> Best regards,
> Krzysztof
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
index fea15f3cf910..3cda5aa8d03c 100644
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -123,6 +123,26 @@ 
 			clock-names = "core";
 		};
 
+		cryptobam: dma-controller@704000 {
+			compatible = "qcom,bam-v1.7.0";
+			reg = <0x00704000 0x20000>;
+			interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
+			#dma-cells = <1>;
+			qcom,ee = <1>;
+			qcom,controlled-remotely;
+		};
+
+		crypto: crypto@73a000 {
+			compatible = "qcom,crypto-v5.1";
+			reg = <0x0073a000 0x6000>;
+			clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
+				 <&gcc GCC_CRYPTO_AXI_CLK>,
+				 <&gcc GCC_CRYPTO_CLK>;
+			clock-names = "iface", "bus", "core";
+			dmas = <&cryptobam 2>, <&cryptobam 3>;
+			dma-names = "rx", "tx";
+		};
+
 		tlmm: pinctrl@1000000 {
 			compatible = "qcom,ipq9574-tlmm";
 			reg = <0x01000000 0x300000>;