| Message ID | 20230512104746.1797865-4-joychakr@google.com |
|---|---|
| State | Accepted |
| Commit | 9f34baf67e4d08908fd94ff29c825bb673295336 |
| Headers | show |
| Series | spi: dw: DW SPI DMA Driver updates | expand |
On Fri, May 12, 2023 at 10:47:45AM +0000, Joy Chakraborty wrote: > n_bytes variable in the driver represents the number of bytes per word > that needs to be sent/copied to fifo. Bits/word can be between 8 and 32 FIFO > bits from the client but in memory they are a power of 2, same is mentioned > in spi.h header: > " Just a blank line is enough here. > * @bits_per_word: Data transfers involve one or more words; word sizes > * like eight or 12 bits are common. In-memory wordsizes are > * powers of two bytes (e.g. 20 bit samples use 32 bits). > * This may be changed by the device's driver, or left at the > * default (0) indicating protocol words are eight bit bytes. > * The spi_transfer.bits_per_word can override this for each transfer. > " And here. > Hence, round of n_bytes to a power of 2 to avoid values like 3 which > would generate unalligned/odd accesses to memory/fifo. FIFO > Fixes: a51acc2400d4 ("spi: dw: Add support for 32-bits max xfer size") > Suggested-by: Andy Shevchenko <andriy.shevchenko@intel.com> > Signed-off-by: Joy Chakraborty <joychakr@google.com> > Reviewed-by: Serge Semin <fancer.lancer@gmail.com> > Tested-by: Serge Semin <fancer.lancer@gmail.com> > * tested on Baikal-T1 based system with DW SPI-looped back interface > transferring a chunk of data with DFS:8,12,16. This shouldn't be here. It's not a tag.
diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index ae3108c70f50..7778b19bcb6c 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -426,7 +426,10 @@ static int dw_spi_transfer_one(struct spi_controller *master, int ret; dws->dma_mapped = 0; - dws->n_bytes = DIV_ROUND_UP(transfer->bits_per_word, BITS_PER_BYTE); + dws->n_bytes = + roundup_pow_of_two(DIV_ROUND_UP(transfer->bits_per_word, + BITS_PER_BYTE)); + dws->tx = (void *)transfer->tx_buf; dws->tx_len = transfer->len / dws->n_bytes; dws->rx = transfer->rx_buf;
n_bytes variable in the driver represents the number of bytes per word that needs to be sent/copied to fifo. Bits/word can be between 8 and 32 bits from the client but in memory they are a power of 2, same is mentioned in spi.h header: " * @bits_per_word: Data transfers involve one or more words; word sizes * like eight or 12 bits are common. In-memory wordsizes are * powers of two bytes (e.g. 20 bit samples use 32 bits). * This may be changed by the device's driver, or left at the * default (0) indicating protocol words are eight bit bytes. * The spi_transfer.bits_per_word can override this for each transfer. " Hence, round of n_bytes to a power of 2 to avoid values like 3 which would generate unalligned/odd accesses to memory/fifo. Fixes: a51acc2400d4 ("spi: dw: Add support for 32-bits max xfer size") Suggested-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Joy Chakraborty <joychakr@google.com> Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Tested-by: Serge Semin <fancer.lancer@gmail.com> * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. --- drivers/spi/spi-dw-core.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)