diff mbox series

arm64: dts: qcom: sa8775p: mark the UFS controller as dma-coherent

Message ID 20230515121908.303432-1-brgl@bgdev.pl
State New
Headers show
Series arm64: dts: qcom: sa8775p: mark the UFS controller as dma-coherent | expand

Commit Message

Bartosz Golaszewski May 15, 2023, 12:19 p.m. UTC
From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

The UFS is cache coherent, so mark it as such in the dtsi.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 1 +
 1 file changed, 1 insertion(+)

Comments

Manivannan Sadhasivam May 17, 2023, 5:41 a.m. UTC | #1
On Mon, May 15, 2023 at 02:19:08PM +0200, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
> 
> The UFS is cache coherent, so mark it as such in the dtsi.

UFS controller

> 
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

Suggested-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>

- Mani

> ---
>  arch/arm64/boot/dts/qcom/sa8775p.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index c5e2e3256bc4..c0717dac100c 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -605,6 +605,7 @@ ufs_mem_hc: ufs@1d84000 {
>  			power-domains = <&gcc UFS_PHY_GDSC>;
>  			required-opps = <&rpmhpd_opp_nom>;
>  			iommus = <&apps_smmu 0x100 0x0>;
> +			dma-coherent;
>  			clocks = <&gcc GCC_UFS_PHY_AXI_CLK>,
>  				 <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
>  				 <&gcc GCC_UFS_PHY_AHB_CLK>,
> -- 
> 2.39.2
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index c5e2e3256bc4..c0717dac100c 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -605,6 +605,7 @@  ufs_mem_hc: ufs@1d84000 {
 			power-domains = <&gcc UFS_PHY_GDSC>;
 			required-opps = <&rpmhpd_opp_nom>;
 			iommus = <&apps_smmu 0x100 0x0>;
+			dma-coherent;
 			clocks = <&gcc GCC_UFS_PHY_AXI_CLK>,
 				 <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
 				 <&gcc GCC_UFS_PHY_AHB_CLK>,