diff mbox series

[2/3] dt-bindings: rtc: Add Mstar SSD20xD RTC devicetree bindings documentation

Message ID 20230517144144.365631-3-romain.perier@gmail.com
State New
Headers show
Series Add RTC for MStar SSD20xD SoCs | expand

Commit Message

Romain Perier May 17, 2023, 2:41 p.m. UTC
This adds the documentation for the devicetree bindings of the Mstar
SSD20xD RTC driver.

Signed-off-by: Romain Perier <romain.perier@gmail.com>
---
 .../bindings/rtc/mstar,ssd20xd-rtc.yaml       | 37 +++++++++++++++++++
 1 file changed, 37 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/rtc/mstar,ssd20xd-rtc.yaml

Comments

Krzysztof Kozlowski May 31, 2023, 6:49 a.m. UTC | #1
On 31/05/2023 01:12, Daniel Palmer wrote:
> Hi Krzysztof,
> 
> On Tue, 30 May 2023 at 17:01, Krzysztof Kozlowski <krzk@kernel.org> wrote:
>>> This is
>>> exactly the case for rtc-msc313e and it was not an issue.
>>
>> So that was my question - can it be anything else? There is literally no
>> description of the hardware... Neither in commit msg nor in description:
>> field in bindings.
> 
> This RTC block is a block inside of the SSD201/SSD202D (they are the

But what is SSD201?

> same die with different memory attached) and is only found there.
> The documentation we have for this is literally one page in a PDF that
> says "RTC registers".
> It could be an IP block licensed from somewhere and technically have a
> better name but right now all we know is this RTC block is the one in
> that chip and that chip is the first known instance of it.
> 
> Say we manage to get the ethernet mainlined at some point: That's a
> lot easier as we know already it's a hacked up version of the cadence
> macb so the compatible can be "macb something".
> 
>>>> What about interrupt line?
>>>
>>> There is currently no interrupt right now, we have not yet the irqchip
>>> code for handling the alarm irq of this rtc block.
>>
>> So you are going to change the hardware and add the interrupt line? We
>> do not talk about drivers, but hardware. Whether your driver handles it
>> or not, matters less.
>>
>> Describe the hardware, not the current implementation of one driver.
> 
> We don't really know how the interrupt is wired up in the hardware properly yet.

OK

Best regards,
Krzysztof
Daniel Palmer May 31, 2023, 10:26 p.m. UTC | #2
Hi Krzysztof,

On Wed, 31 May 2023 at 15:49, Krzysztof Kozlowski <krzk@kernel.org> wrote:
> > This RTC block is a block inside of the SSD201/SSD202D (they are the
>
> But what is SSD201?

Dual Cortex A7 SoC with integrated memory (SSD201 == 64MB, SSD202D ==
128MB) that happens to have an RTC.

Cheers,

Daniel
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/rtc/mstar,ssd20xd-rtc.yaml b/Documentation/devicetree/bindings/rtc/mstar,ssd20xd-rtc.yaml
new file mode 100644
index 000000000000..2acd86cce69f
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/mstar,ssd20xd-rtc.yaml
@@ -0,0 +1,37 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rtc/mstar,ssd20xd-rtc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mstar SSD20xD RTC
+
+allOf:
+  - $ref: rtc.yaml#
+
+maintainers:
+  - Daniel Palmer <daniel@0x0f.com>
+  - Romain Perier <romain.perier@gmail.com>
+
+properties:
+  compatible:
+    enum:
+      - mstar,ssd20xd-rtc
+  reg:
+    maxItems: 1
+
+  start-year: true
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    rtc@6800 {
+        compatible = "mstar,ssd20xd-rtc";
+        reg = <0x6800 0x200>;
+    };
+...