diff mbox series

[v2,4/6] clk: qcom: Add lpass audio clock controller driver for SC8280XP

Message ID 20230525122930.17141-5-srinivas.kandagatla@linaro.org
State Superseded
Headers show
Series clk: qcom: sc8280xp: add lpasscc reset control | expand

Commit Message

Srinivas Kandagatla May 25, 2023, 12:29 p.m. UTC
Add support for the lpass audio clock controller found on SC8280XP based
devices. This would allow lpass peripheral loader drivers to control the
clocks and bring the subsystems out of reset.

Currently this patch only supports resets as the Q6DSP is in control of
LPASS IP which manages most of the clocks via Q6PRM service on GPR rpmsg
channel.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 drivers/clk/qcom/lpasscc-sc8280xp.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

Comments

Johan Hovold May 26, 2023, 12:14 p.m. UTC | #1
On Thu, May 25, 2023 at 01:29:28PM +0100, Srinivas Kandagatla wrote:
> Add support for the lpass audio clock controller found on SC8280XP based
> devices. This would allow lpass peripheral loader drivers to control the
> clocks and bring the subsystems out of reset.
> 
> Currently this patch only supports resets as the Q6DSP is in control of
> LPASS IP which manages most of the clocks via Q6PRM service on GPR rpmsg
> channel.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
>  drivers/clk/qcom/lpasscc-sc8280xp.c | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
> 
> diff --git a/drivers/clk/qcom/lpasscc-sc8280xp.c b/drivers/clk/qcom/lpasscc-sc8280xp.c
> index 547f15d41a9d..60cc3c98d03d 100644
> --- a/drivers/clk/qcom/lpasscc-sc8280xp.c
> +++ b/drivers/clk/qcom/lpasscc-sc8280xp.c
> @@ -14,6 +14,26 @@
>  #include "common.h"
>  #include "reset.h"
>  
> +static const struct qcom_reset_map lpass_audiocc_sc8280xp_resets[] = {
> +	[LPASS_AUDIO_SWR_RX_CGCR] =  { 0xa0, 1 },
> +	[LPASS_AUDIO_SWR_WSA_CGCR] = { 0xb0, 1 },
> +	[LPASS_AUDIO_SWR_WSA2_CGCR] =  { 0xd8, 1 },
> +};
> +
> +static struct regmap_config lpass_audiocc_sc8280xp_regmap_config = {
> +	.reg_bits = 32,
> +	.reg_stride = 4,
> +	.val_bits = 32,
> +	.name = "lpass-audio-csr",
> +	.max_register = 0x1000,
> +};
> +
> +static const struct qcom_cc_desc lpass_audiocc_reset_sc8280xp_desc = {

Similar here, should this not be lpass_audiocc_sc8280xp_reset_desc or
similar for consistency?

> +	.config = &lpass_audiocc_sc8280xp_regmap_config,
> +	.resets = lpass_audiocc_sc8280xp_resets,
> +	.num_resets = ARRAY_SIZE(lpass_audiocc_sc8280xp_resets),
> +};
> +
>  static const struct qcom_reset_map lpasscc_sc8280xp_resets[] = {
>  	[LPASS_AUDIO_SWR_TX_CGCR] = { 0xc010, 1 },
>  };
> @@ -34,6 +54,9 @@ static const struct qcom_cc_desc lpasscc_reset_sc8280xp_desc = {
>  
>  static const struct of_device_id lpasscc_sc8280xp_match_table[] = {
>  	{
> +		.compatible = "qcom,sc8280xp-lpassaudiocc",
> +		.data = &lpass_audiocc_reset_sc8280xp_desc,
> +	}, {
>  		.compatible = "qcom,sc8280xp-lpasscc",
>  		.data = &lpasscc_reset_sc8280xp_desc,
>  	},

LGTM otherwise:

Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
diff mbox series

Patch

diff --git a/drivers/clk/qcom/lpasscc-sc8280xp.c b/drivers/clk/qcom/lpasscc-sc8280xp.c
index 547f15d41a9d..60cc3c98d03d 100644
--- a/drivers/clk/qcom/lpasscc-sc8280xp.c
+++ b/drivers/clk/qcom/lpasscc-sc8280xp.c
@@ -14,6 +14,26 @@ 
 #include "common.h"
 #include "reset.h"
 
+static const struct qcom_reset_map lpass_audiocc_sc8280xp_resets[] = {
+	[LPASS_AUDIO_SWR_RX_CGCR] =  { 0xa0, 1 },
+	[LPASS_AUDIO_SWR_WSA_CGCR] = { 0xb0, 1 },
+	[LPASS_AUDIO_SWR_WSA2_CGCR] =  { 0xd8, 1 },
+};
+
+static struct regmap_config lpass_audiocc_sc8280xp_regmap_config = {
+	.reg_bits = 32,
+	.reg_stride = 4,
+	.val_bits = 32,
+	.name = "lpass-audio-csr",
+	.max_register = 0x1000,
+};
+
+static const struct qcom_cc_desc lpass_audiocc_reset_sc8280xp_desc = {
+	.config = &lpass_audiocc_sc8280xp_regmap_config,
+	.resets = lpass_audiocc_sc8280xp_resets,
+	.num_resets = ARRAY_SIZE(lpass_audiocc_sc8280xp_resets),
+};
+
 static const struct qcom_reset_map lpasscc_sc8280xp_resets[] = {
 	[LPASS_AUDIO_SWR_TX_CGCR] = { 0xc010, 1 },
 };
@@ -34,6 +54,9 @@  static const struct qcom_cc_desc lpasscc_reset_sc8280xp_desc = {
 
 static const struct of_device_id lpasscc_sc8280xp_match_table[] = {
 	{
+		.compatible = "qcom,sc8280xp-lpassaudiocc",
+		.data = &lpass_audiocc_reset_sc8280xp_desc,
+	}, {
 		.compatible = "qcom,sc8280xp-lpasscc",
 		.data = &lpasscc_reset_sc8280xp_desc,
 	},