| Message ID | 20230526125305.19626-4-quic_kathirav@quicinc.com |
|---|---|
| State | Accepted |
| Commit | 546f0617a22a481f3ca1f7e058aea0c40517c64e |
| Headers | show |
| Series | Add QFPROM support for few IPQ SoCs | expand |
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index f531797f2619..0f6d6c6daed2 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -302,6 +302,13 @@ status = "disabled"; }; + qfprom: efuse@a4000 { + compatible = "qcom,ipq6018-qfprom", "qcom,qfprom"; + reg = <0x0 0x000a4000 0x0 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + }; + prng: qrng@e1000 { compatible = "qcom,prng-ee"; reg = <0x0 0x000e3000 0x0 0x1000>;
IPQ6018 has efuse region to determine the various HW quirks. Lets add the initial support and the individual fuses will be added as they are required. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> --- Changes in V2: - Reorder the node based on node address arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)