[v3,1/3] dt-bindings: timer: atmel,at91sam9260-pit: convert to yaml

diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index 67a66bf74895..54d3f586403e 100644
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -4,18 +4,6 @@  Chipid required properties:
 - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
 - reg : Should contain registers location and length
 
-PIT Timer required properties:
-- compatible: Should be "atmel,at91sam9260-pit"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt for the PIT which is the IRQ line
-  shared across all System Controller members.
-
-PIT64B Timer required properties:
-- compatible: Should be "microchip,sam9x60-pit64b"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt for PIT64B timer
-- clocks: Should contain the available clock sources for PIT64B timer.
-
 System Timer (ST) required properties:
 - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
 - reg: Should contain registers location and length
diff --git a/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml b/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml
new file mode 100644
index 000000000000..d0f3f80db4cb
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml
@@ -0,0 +1,99 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/atmel,at91sam9260-pit.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip AT91 Periodic Interval Timer (PIT)
+
+maintainers:
+  - Claudiu Beznea <claudiu.beznea@microchip.com>
+
+description:
+  Microchip AT91 periodic interval timer provides the operating system scheduler
+  interrupt. It is designed to offer maximum accuracy and efficient management,
+  even for systems with long response time.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - const: microchip,sama7g5-pit64b
+          - const: microchip,sam9x60-pit64b
+      - items:
+          enum:
+            - atmel,at91sam9260-pit
+            - microchip,sam9x60-pit64b
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    minItems: 1
+    maxItems: 2
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: atmel,at91sam9260-pit
+    then:
+      properties:
+        interrupts:
+          description:
+            Shared interrupt between all system controller members (power management
+            controller, watchdog, PIT, reset controller, real-time timer, real-time
+            clock, memory controller, debug unit, system timer).
+        clocks:
+          maxItems: 1
+
+    else:
+      properties:
+        clocks:
+          minItems: 2
+        clock-names:
+          items:
+            - const: pclk
+            - const: gclk
+      required:
+        - clock-names
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    /* AT91RM9200 */
+    #include <dt-bindings/clock/at91.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    pit: timer@fffffe40 {
+        compatible = "atmel,at91sam9260-pit";
+        reg = <0xfffffe40 0x10>;
+        interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+        clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+    };
+
+  - |
+    /* SAM9X60 */
+    #include <dt-bindings/clock/at91.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    pit64b: timer@f0028000 {
+        compatible = "microchip,sam9x60-pit64b";
+        reg = <0xf0028000 0x100>;
+        interrupts = <37 IRQ_TYPE_LEVEL_HIGH 7>;
+        clocks = <&pmc PMC_TYPE_PERIPHERAL 37>, <&pmc PMC_TYPE_GCK 37>;
+        clock-names = "pclk", "gclk";
+    };
+
+...