From patchwork Mon May 30 01:08:56 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Corey Minyard X-Patchwork-Id: 68813 Delivered-To: patch@linaro.org Received: by 10.140.92.199 with SMTP id b65csp1159502qge; Sun, 29 May 2016 18:09:36 -0700 (PDT) X-Received: by 10.66.122.175 with SMTP id lt15mr41909375pab.51.1464570569483; Sun, 29 May 2016 18:09:29 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id sm1si8677079pac.12.2016.05.29.18.09.29; Sun, 29 May 2016 18:09:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-i2c-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@gmail.com; spf=pass (google.com: best guess record for domain of linux-i2c-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-i2c-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753383AbcE3BJR (ORCPT + 1 other); Sun, 29 May 2016 21:09:17 -0400 Received: from mail-pf0-f193.google.com ([209.85.192.193]:35848 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753114AbcE3BJP (ORCPT ); Sun, 29 May 2016 21:09:15 -0400 Received: by mail-pf0-f193.google.com with SMTP id 62so7872695pfd.3; Sun, 29 May 2016 18:09:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=KPtlmNpsU4n0DFLbIT1xEypGAT0v+Jt2JJ6S6Wzzazw=; b=arH42h3VSa/2bDz7D2+Ifr5tqNRT2vU/y32h9FcCFp8dX/IVoMu2bPN5CC9buZAebV xaQ6IJOgUqr9yytSc3QfnEUTcgEnQmhMNYoi0bb2NifikYC8BmaOoq8xd/EyLwKsM0pK WVkeVf1rwUZWEi58tgd+FMGVwzWBgmBvLnmBBSnmmWg4LHFQZeAJpn17Rvfucm3Ckh68 h4hBhCMWLRAjJmNhXB5wREWPp3Dc7rNHAUYgbrdRYUeWnOxHU+cfmXBrM4NB4njVpqHh X19C1WpV3ZnElG+rnrb/ELIuXI9YOC7TAckdFTSeMrCPtvKhz2hEL0kwyGTQIWK3aGXZ WX6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=KPtlmNpsU4n0DFLbIT1xEypGAT0v+Jt2JJ6S6Wzzazw=; b=SFdhLsW3Q68Yf6KyealCe0Rkjv9e5mZrxXLGS2xIBg3mC+fdR07M7PcMBnEmHzbQxv lsJDBaQ+j52Kzqbxh9wJnpLC9Uwz3lg1i+pDENfWWvVU5eHqKcktwjeBPk6i5hslLS36 sFVXD/wmGz3C1pn2W8lPdcqOAQQbB4wE81AsokZav6lDBLNOkn78TVKWNZzkNq7ZOgs7 LLsbQ253JCooC/DE/uJGkQlYwVLIhof3zPNwxbHQDgnq55uOS/7D4kli+C9xX6usbetA c76/fijp7vKIg2+fD8ERQm6P8Z8m0OCaKKCpACdBWsM3yO3+UQmXSULrbpYzkst/dT6k FLvQ== X-Gm-Message-State: ALyK8tKCqoaKVKqdPfQDAnQVQ3vqzc88TNwJWRgzjIL29+0GohwaV9D7qR7Ug4OWDHlYHA== X-Received: by 10.98.30.132 with SMTP id e126mr42755444pfe.109.1464570554756; Sun, 29 May 2016 18:09:14 -0700 (PDT) Received: from serve.minyard.net ([108.19.215.157]) by smtp.gmail.com with ESMTPSA id j192sm28212993pfc.25.2016.05.29.18.09.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 29 May 2016 18:09:13 -0700 (PDT) Received: from t430.minyard.net (t430m.minyard.net [192.168.27.3]) by serve.minyard.net (Postfix) with ESMTPA id 2F8BC966; Sun, 29 May 2016 20:09:11 -0500 (CDT) Received: by t430.minyard.net (Postfix, from userid 1000) id B024430051E; Sun, 29 May 2016 20:09:07 -0500 (CDT) From: minyard@acm.org To: Jean Delvare , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, minyard@acm.org Cc: Corey Minyard Subject: [PATCH v2 02/10] i2c-i801: Move hostcfg set/reset to i801_access() Date: Sun, 29 May 2016 20:08:56 -0500 Message-Id: <1464570544-975-3-git-send-email-minyard@acm.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1464570544-975-1-git-send-email-minyard@acm.org> References: <1464570544-975-1-git-send-email-minyard@acm.org> Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org From: Corey Minyard The HSTCFG register save/restore was done in i2c_block_transaction, but all the checks were already done in i801_access, so move it into those checks. This results in a small savings of code, and moves some special handing for I2C transactions into code that is already handling special things for I2C transactions. Signed-off-by: Corey Minyard --- drivers/i2c/busses/i2c-i801.c | 41 +++++++++++++++++++---------------------- 1 file changed, 19 insertions(+), 22 deletions(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index 818c0c8..205f9d0 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c @@ -661,20 +661,6 @@ static int i801_block_transaction(struct i801_priv *priv, int command, int hwpec) { int result = 0; - unsigned char hostc; - - if (command == I2C_SMBUS_I2C_BLOCK_DATA) { - if (read_write == I2C_SMBUS_WRITE) { - /* set I2C_EN bit in configuration register */ - pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc); - pci_write_config_byte(priv->pci_dev, SMBHSTCFG, - hostc | SMBHSTCFG_I2C_EN); - } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) { - dev_err(&priv->pci_dev->dev, - "I2C block read is unsupported!\n"); - return -EOPNOTSUPP; - } - } if (read_write == I2C_SMBUS_WRITE || command == I2C_SMBUS_I2C_BLOCK_DATA) { @@ -699,11 +685,6 @@ static int i801_block_transaction(struct i801_priv *priv, read_write, command); - if (command == I2C_SMBUS_I2C_BLOCK_DATA - && read_write == I2C_SMBUS_WRITE) { - /* restore saved configuration register value */ - pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc); - } return result; } @@ -715,6 +696,7 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr, int hwpec; int block = 0; int ret = 0, xact = 0; + int hostc = -1; struct i801_priv *priv = i2c_get_adapdata(adap); pm_runtime_get_sync(&priv->pci_dev->dev); @@ -764,12 +746,24 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr, /* NB: page 240 of ICH5 datasheet shows that the R/#W * bit should be cleared here, even when reading */ outb_p((addr & 0x7f) << 1, SMBHSTADD(priv)); - if (read_write == I2C_SMBUS_READ) { + if (read_write == I2C_SMBUS_WRITE) { + unsigned char thostc; + + outb_p(command, SMBHSTCMD(priv)); + /* set I2C_EN bit in configuration register */ + pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &thostc); + pci_write_config_byte(priv->pci_dev, SMBHSTCFG, + thostc | SMBHSTCFG_I2C_EN); + hostc = thostc; + } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) { + dev_err(&priv->pci_dev->dev, + "I2C block read is unsupported!\n"); + ret = -EOPNOTSUPP; + goto out; + } else /* NB: page 240 of ICH5 datasheet also shows * that DATA1 is the cmd field when reading */ outb_p(command, SMBHSTDAT1(priv)); - } else - outb_p(command, SMBHSTCMD(priv)); block = 1; break; default: @@ -798,6 +792,9 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr, outb_p(inb_p(SMBAUXCTL(priv)) & ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv)); + if (hostc >= 0) + pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc); + if (block) goto out; if (ret)