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[1/3] dt-bindings: arm-smmu: Add interconnect for qcom SMMUs

Message ID 20230609054141.18938-2-quic_ppareek@quicinc.com
State New
Headers show
Series arm64: dts: qcom: sa8775p: Add interconnect to SMMU | expand

Commit Message

Parikshit Pareek June 9, 2023, 5:41 a.m. UTC
There are certain SMMUs on qcom SoCs, which need to set interconnect-
bandwidth, before accessing any MIMO mapped HW registers, and accessing
RAM during page table walk. Hence introduce the due bindings for
interconnects.

Reported-by: Eric Chanudet <echanude@redhat.com>
Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
---
 .../devicetree/bindings/iommu/arm,smmu.yaml   | 22 +++++++++++++++++++
 1 file changed, 22 insertions(+)
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Patch

diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index ba677d401e24..75e00789d8c2 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -327,6 +327,28 @@  allOf:
             - description: interface clock required to access smmu's registers
                 through the TCU's programming interface.
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              qcom,sa8775p-smmu-500
+    then:
+      properties:
+        interconnects:
+          minItems: 1
+          maxItems: 1
+
+        interconnect-names:
+          minItems: 1
+          items:
+            - const: tbu_mc
+
+        icc_bw:
+          $ref: /schemas/types.yaml#/definitions/int32
+          description:
+            An integer expressing the interconnect bandwidth(MBps) to be set.
+
   - if:
       properties:
         compatible: