| Message ID | 20230623203056.689705-12-varshini.rajendran@microchip.com |
|---|---|
| State | New |
| Headers | show
Return-Path: <devicetree-owner@vger.kernel.org>
X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on
aws-us-west-2-korg-lkml-1.web.codeaurora.org
Received: from vger.kernel.org (vger.kernel.org [23.128.96.18])
by smtp.lore.kernel.org (Postfix) with ESMTP id 7DC49C001DC
for <linux-devicetree@archiver.kernel.org>;
Fri, 23 Jun 2023 20:38:39 +0000 (UTC)
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
id S231950AbjFWUih (ORCPT
<rfc822;linux-devicetree@archiver.kernel.org>);
Fri, 23 Jun 2023 16:38:37 -0400
Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55558 "EHLO
lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
with ESMTP id S229451AbjFWUig (ORCPT
<rfc822;devicetree@vger.kernel.org>); Fri, 23 Jun 2023 16:38:36 -0400
Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com
[68.232.154.123])
by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9FA13294E;
Fri, 23 Jun 2023 13:38:05 -0700 (PDT)
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple;
d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp;
t=1687552686; x=1719088686;
h=from:to:cc:subject:date:message-id:in-reply-to:
references:mime-version:content-transfer-encoding;
bh=pO0SddiNRb5mLg5JiH+I1hubEytCoBnQJ1wPhnv+mrQ=;
b=Rz7OZkAwe1vkGsAhQb/Sx9QGiecHjlgXPsaKf02OR5rIytHZNSAqV1vg
hXahwDHQe7STEEehyJOpZAFjXtJreXED/ii+uj3a3gOXj1FzKNGy5Yf3m
z8dJdzUD0tobjrhyxd5Fxvg1W0J3AkM6SfqMSKDzvb0eppd9QHn0TgLD7
C3LyDN8/nfENToBXCEa0r7tTZPi/HyubSEfYbpf7kMD929TRgzk7Bo0ZR
k2TKGsryBTDsnnhpvQ52YNSZ5P/qmf41FqMwr9JETXT2Hz9YvtuBH1sWL
LbAFClDA8JIUSEzhtAUCEe/AbiSYMn4qlq+BiLUdPwJmaxDBLk9QJn4Cy
w==;
X-IronPort-AV: E=Sophos;i="6.01,153,1684825200";
d="scan'208";a="221702264"
X-Amp-Result: SKIPPED(no attachment in message)
Received: from unknown (HELO email.microchip.com) ([170.129.1.10])
by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256;
23 Jun 2023 13:37:11 -0700
Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by
chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server
(version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id
15.1.2507.21; Fri, 23 Jun 2023 13:36:51 -0700
Received: from che-lt-i67070.amer.actel.com (10.10.115.15) by
chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id
15.1.2507.21 via Frontend Transport; Fri, 23 Jun 2023 13:36:21 -0700
From: Varshini Rajendran <varshini.rajendran@microchip.com>
To: <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<conor+dt@kernel.org>, <nicolas.ferre@microchip.com>,
<alexandre.belloni@bootlin.com>, <claudiu.beznea@microchip.com>,
<mturquette@baylibre.com>, <sboyd@kernel.org>,
<herbert@gondor.apana.org.au>, <davem@davemloft.net>,
<vkoul@kernel.org>, <tglx@linutronix.de>, <maz@kernel.org>,
<lee@kernel.org>, <ulf.hansson@linaro.org>,
<tudor.ambarus@linaro.org>, <miquel.raynal@bootlin.com>,
<richard@nod.at>, <vigneshr@ti.com>, <edumazet@google.com>,
<kuba@kernel.org>, <pabeni@redhat.com>, <linus.walleij@linaro.org>,
<p.zabel@pengutronix.de>, <olivia@selenic.com>,
<a.zummo@towertech.it>, <radu_nicolae.pirea@upb.ro>,
<richard.genoud@gmail.com>, <gregkh@linuxfoundation.org>,
<lgirdwood@gmail.com>, <broonie@kernel.org>,
<wim@linux-watchdog.org>, <linux@roeck-us.net>, <arnd@arndb.de>,
<olof@lixom.net>, <soc@kernel.org>, <linux@armlinux.org.uk>,
<sre@kernel.org>, <jerry.ray@microchip.com>,
<horatiu.vultur@microchip.com>, <durai.manickamkr@microchip.com>,
<varshini.rajendran@microchip.com>, <andrew@lunn.ch>,
<alain.volmat@foss.st.com>, <neil.armstrong@linaro.org>,
<mihai.sain@microchip.com>, <eugen.hristev@collabora.com>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>,
<linux-crypto@vger.kernel.org>, <dmaengine@vger.kernel.org>,
<linux-i2c@vger.kernel.org>, <linux-mmc@vger.kernel.org>,
<linux-mtd@lists.infradead.org>, <netdev@vger.kernel.org>,
<linux-gpio@vger.kernel.org>, <linux-rtc@vger.kernel.org>,
<linux-spi@vger.kernel.org>, <linux-serial@vger.kernel.org>,
<alsa-devel@alsa-project.org>, <linux-usb@vger.kernel.org>,
<linux-watchdog@vger.kernel.org>, <linux-pm@vger.kernel.org>
CC: <Hari.PrasathGE@microchip.com>, <cristian.birsan@microchip.com>,
<balamanikandan.gunasundar@microchip.com>,
<manikandan.m@microchip.com>, <dharma.b@microchip.com>,
<nayabbasha.sayed@microchip.com>, <balakrishnan.s@microchip.com>
Subject: [PATCH v2 11/45] dt-bindings: clk: at91: add bindings for SAM9X7's
clock controller
Date: Sat, 24 Jun 2023 02:00:22 +0530
Message-ID: <20230623203056.689705-12-varshini.rajendran@microchip.com>
X-Mailer: git-send-email 2.25.1
In-Reply-To: <20230623203056.689705-1-varshini.rajendran@microchip.com>
References: <20230623203056.689705-1-varshini.rajendran@microchip.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Content-Type: text/plain
Precedence: bulk
List-ID: <devicetree.vger.kernel.org>
X-Mailing-List: devicetree@vger.kernel.org
|
| Series |
Add support for sam9x7 SoC family
|
expand
|
diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt index 13f45db3b66d..446937fab950 100644 --- a/Documentation/devicetree/bindings/clock/at91-clock.txt +++ b/Documentation/devicetree/bindings/clock/at91-clock.txt @@ -10,8 +10,9 @@ Required properties: - compatible : shall be one of the following: "atmel,at91sam9x5-sckc", "atmel,sama5d3-sckc", - "atmel,sama5d4-sckc" or - "microchip,sam9x60-sckc": + "atmel,sama5d4-sckc", + "microchip,sam9x60-sckc" or + "microchip,sam9x7-sckc": at91 SCKC (Slow Clock Controller) - #clock-cells : shall be 1 for "microchip,sam9x60-sckc" otherwise shall be 0. - clocks : shall be the input parent clock phandle for the clock. @@ -32,7 +33,7 @@ Power Management Controller (PMC): Required properties: - compatible : shall be "atmel,<chip>-pmc", "syscon" or - "microchip,sam9x60-pmc" + "microchip,sam9x60-pmc" or "microchip,sam9x7-pmc" <chip> can be: at91rm9200, at91sam9260, at91sam9261, at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9g15, at91sam9g25, at91sam9g35, at91sam9x25, at91sam9x35, at91sam9x5,
Add bindings for SAM9X7's slow clock controller and pmc. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> --- Documentation/devicetree/bindings/clock/at91-clock.txt | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)