@@ -752,6 +752,13 @@ static void dsi_ctrl_enable(struct msm_dsi_host *msm_host,
/* Always insert DCS command */
data |= DSI_CMD_CFG1_INSERT_DCS_COMMAND;
dsi_write(msm_host, REG_DSI_CMD_CFG1, data);
+
+ if (msm_host->cfg_hnd->major == MSM_DSI_VER_MAJOR_6G &&
+ msm_host->cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V1_3) {
+ data = dsi_read(msm_host, REG_DSI_CMD_MODE_MDP_CTRL2);
+ data |= DSI_CMD_MODE_MDP_CTRL2_BURST_MODE;
+ dsi_write(msm_host, REG_DSI_CMD_MODE_MDP_CTRL2, data);
+ }
}
dsi_write(msm_host, REG_DSI_CMD_DMA_CTRL,
During a frame transfer in command mode, there could be frequent LP11 <-> HS transitions when multiple DCS commands are sent mid-frame or if the DSI controller is running on slow clock and is throttled. To minimize frame latency due to these transitions, it is recommended to send the frame in a single burst. This feature is supported for DSI 6G 1.3 and above, thus enable burst mode if supported. Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> --- Changes in v2: - Moved MDP_CTRL2 register setting to dsi_ctrl_config() (Dmitry/Marijn) - Read previous value of MDP_CTRL2 register before writing to it (Dmitry) - Link to v1: https://lore.kernel.org/r/20230608-b4-add-burst-mode-v1-1-55dfbcfada55@quicinc.com --- drivers/gpu/drm/msm/dsi/dsi_host.c | 7 +++++++ 1 file changed, 7 insertions(+) --- base-commit: a0364260213c96f6817f7e85cdce293cb743460f change-id: 20230608-b4-add-burst-mode-a5bb144069fa Best regards,