Message ID | 20230622-topic-8998clk-v2-2-6222fbc2916b@linaro.org |
---|---|
State | Accepted |
Commit | 9127b3770ef2d737e8b7afd1d9274153d75bcf90 |
Headers | show |
Series | MSM8998 clk cleanups and fixups | expand |
diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml index 422f5776a771..67e1eae0bbd0 100644 --- a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml @@ -297,6 +297,7 @@ allOf: - description: HDMI phy PLL clock - description: DisplayPort phy PLL link clock - description: DisplayPort phy PLL vco clock + - description: Global PLL 0 DIV clock clock-names: items: @@ -309,6 +310,7 @@ allOf: - const: hdmipll - const: dplink - const: dpvco + - const: gpll0_div - if: properties: