@@ -844,6 +844,44 @@ static const struct venus_resources sm8250_res = {
.fwname = "qcom/vpu-1.0/venus.mdt",
};
+static const struct reg_val sm8350_reg_preset[] = {
+ { 0xb0088, 0, 0x11 },
+};
+
+static const struct venus_resources sm8350_res = {
+ .freq_tbl = sm8250_freq_table,
+ .freq_tbl_size = ARRAY_SIZE(sm8250_freq_table),
+ .reg_tbl = sm8350_reg_preset,
+ .reg_tbl_size = ARRAY_SIZE(sm8350_reg_preset),
+ .bw_tbl_enc = sm8250_bw_table_enc,
+ .bw_tbl_enc_size = ARRAY_SIZE(sm8250_bw_table_enc),
+ .bw_tbl_dec = sm8250_bw_table_dec,
+ .bw_tbl_dec_size = ARRAY_SIZE(sm8250_bw_table_dec),
+ .clks = { "core", "iface" },
+ .clks_num = 2,
+ .resets = { "core" },
+ .resets_num = 1,
+ .vcodec0_clks = { "vcodec0_core" },
+ .vcodec_clks_num = 1,
+ .vcodec_pmdomains = { "venus", "vcodec0" },
+ .vcodec_pmdomains_num = 2,
+ .opp_pmdomain = (const char *[]) { "mx", NULL },
+ .vcodec_num = 1,
+ .max_load = 7833600, /* 7680x4320@60fps */
+ .hfi_version = HFI_VERSION_6XX,
+ .vpu_version = VPU_VERSION_IRIS2,
+ .num_vpp_pipes = 4,
+ .vmem_id = VIDC_RESOURCE_NONE,
+ .vmem_size = 0,
+ .vmem_addr = 0,
+ .dma_mask = GENMASK(31, 29) - 1,
+ .cp_start = 0,
+ .cp_size = 0x25800000,
+ .cp_nonpixel_start = 0x1000000,
+ .cp_nonpixel_size = 0x24800000,
+ .fwname = "qcom/vpu-2.0/venus.mbn",
+};
+
static const struct freq_tbl sc7280_freq_table[] = {
{ 0, 460000000 },
{ 0, 424000000 },
@@ -911,6 +949,7 @@ static const struct of_device_id venus_dt_match[] = {
{ .compatible = "qcom,sc7180-venus", .data = &sc7180_res },
{ .compatible = "qcom,sc7280-venus", .data = &sc7280_res },
{ .compatible = "qcom,sm8250-venus", .data = &sm8250_res },
+ { .compatible = "qcom,sm8350-venus", .data = &sm8350_res },
{ }
};
MODULE_DEVICE_TABLE(of, venus_dt_match);
Add SM8350 configuration data and related compatible. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- drivers/media/platform/qcom/venus/core.c | 39 ++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+)