diff mbox series

[-next,05/21] spi: microchip-core-qspi: switch to use modern name

Message ID 20230810083004.3988597-6-yangyingliang@huawei.com
State New
Headers show
Series spi: switch to use modern name (part3) | expand

Commit Message

Yang Yingliang Aug. 10, 2023, 8:29 a.m. UTC
Change legacy name master to modern name host or controller.

No functional changed.

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
---
 drivers/spi/spi-microchip-core-qspi.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)
diff mbox series

Patch

diff --git a/drivers/spi/spi-microchip-core-qspi.c b/drivers/spi/spi-microchip-core-qspi.c
index 4f76ddf97b10..512542457dcc 100644
--- a/drivers/spi/spi-microchip-core-qspi.c
+++ b/drivers/spi/spi-microchip-core-qspi.c
@@ -25,7 +25,7 @@ 
  * QSPI Control register mask defines
  */
 #define CONTROL_ENABLE		BIT(0)
-#define CONTROL_MASTER		BIT(1)
+#define CONTROL_HOST		BIT(1)
 #define CONTROL_XIP		BIT(2)
 #define CONTROL_XIPADDR		BIT(3)
 #define CONTROL_CLKIDLE		BIT(10)
@@ -299,11 +299,11 @@  static int mchp_coreqspi_setup_clock(struct mchp_coreqspi *qspi, struct spi_devi
 
 static int mchp_coreqspi_setup_op(struct spi_device *spi_dev)
 {
-	struct spi_controller *ctlr = spi_dev->master;
+	struct spi_controller *ctlr = spi_dev->controller;
 	struct mchp_coreqspi *qspi = spi_controller_get_devdata(ctlr);
 	u32 control = readl_relaxed(qspi->regs + REG_CONTROL);
 
-	control |= (CONTROL_MASTER | CONTROL_ENABLE);
+	control |= (CONTROL_HOST | CONTROL_ENABLE);
 	control &= ~CONTROL_CLKIDLE;
 	writel_relaxed(control, qspi->regs + REG_CONTROL);
 
@@ -368,7 +368,7 @@  static inline void mchp_coreqspi_config_op(struct mchp_coreqspi *qspi, const str
 static int mchp_qspi_wait_for_ready(struct spi_mem *mem)
 {
 	struct mchp_coreqspi *qspi = spi_controller_get_devdata
-				    (mem->spi->master);
+				    (mem->spi->controller);
 	u32 status;
 	int ret;
 
@@ -387,7 +387,7 @@  static int mchp_qspi_wait_for_ready(struct spi_mem *mem)
 static int mchp_coreqspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
 {
 	struct mchp_coreqspi *qspi = spi_controller_get_devdata
-				    (mem->spi->master);
+				    (mem->spi->controller);
 	u32 address = op->addr.val;
 	u8 opcode = op->cmd.opcode;
 	u8 opaddr[5];
@@ -505,10 +505,10 @@  static int mchp_coreqspi_probe(struct platform_device *pdev)
 	struct device_node *np = dev->of_node;
 	int ret;
 
-	ctlr = devm_spi_alloc_master(&pdev->dev, sizeof(*qspi));
+	ctlr = devm_spi_alloc_host(&pdev->dev, sizeof(*qspi));
 	if (!ctlr)
 		return dev_err_probe(&pdev->dev, -ENOMEM,
-				     "unable to allocate master for QSPI controller\n");
+				     "unable to allocate host for QSPI controller\n");
 
 	qspi = spi_controller_get_devdata(ctlr);
 	platform_set_drvdata(pdev, qspi);