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[PATCHv2,2/2] arm-cci: fix PMU interrupt flags

Message ID 1467631532-8122-3-git-send-email-mark.rutland@arm.com
State New
Headers show

Commit Message

Mark Rutland July 4, 2016, 11:25 a.m. UTC
Currently the IRQ core is permitted to make the CCI PMU IRQ handler
threaded, and will allow userspace to change the CPU affinity of the
interrupt behind our back. Both of these could violate our
synchronisation requirements with the core perf code, which relies upon
strict CPU affinity and disabling of interrupts to guarantee mutual
exclusion in some cases.

As with the CPU PMU drivers, we should request the interrupt with
IRQF_NOBALANCING and IRQF_NO_THREAD, to avoid these issues. At the same
time, we drop IRQF_SHARED. The interrupt is not shared in practice, and
the driver detects and skips duplicate IRQs at probe time, so it is not
necessary.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>

Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Punit Agrawal <punit.agrawal@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: <arm@kernel.org>
---
 drivers/bus/arm-cci.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

-- 
1.9.1


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diff mbox

Patch

diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c
index a49b283..ffce9e3 100644
--- a/drivers/bus/arm-cci.c
+++ b/drivers/bus/arm-cci.c
@@ -881,7 +881,8 @@  static int pmu_request_irq(struct cci_pmu *cci_pmu, irq_handler_t handler)
 	 * This should allow handling of non-unique interrupt for the counters.
 	 */
 	for (i = 0; i < cci_pmu->nr_irqs; i++) {
-		int err = request_irq(cci_pmu->irqs[i], handler, IRQF_SHARED,
+		int err = request_irq(cci_pmu->irqs[i], handler,
+				IRQF_NOBALANCING | IRQF_NO_THREAD,
 				"arm-cci-pmu", cci_pmu);
 		if (err) {
 			dev_err(&pmu_device->dev, "unable to request IRQ%d for ARM CCI PMU counters\n",