From patchwork Fri Jul 15 17:32:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evan Lloyd X-Patchwork-Id: 72124 Delivered-To: patch@linaro.org Received: by 10.140.29.52 with SMTP id a49csp738691qga; Fri, 15 Jul 2016 10:33:42 -0700 (PDT) X-Received: by 10.37.34.66 with SMTP id i63mr13737562ybi.176.1468604022246; Fri, 15 Jul 2016 10:33:42 -0700 (PDT) Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id t18si5969622qte.74.2016.07.15.10.33.42; Fri, 15 Jul 2016 10:33:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id E8FAE685F3; Fri, 15 Jul 2016 17:33:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id D36D368279; Fri, 15 Jul 2016 17:33:16 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 8842E680F7; Fri, 15 Jul 2016 17:33:08 +0000 (UTC) Received: from cam-smtp0.cambridge.arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by lists.linaro.org (Postfix) with ESMTPS id 3F17D680FA for ; Fri, 15 Jul 2016 17:33:01 +0000 (UTC) Received: from E107800.Emea.Arm.com (e107800.emea.arm.com [10.1.31.138]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id u6FHWxEj024608; Fri, 15 Jul 2016 18:32:59 +0100 From: evan.lloyd@arm.com To: linaro-uefi@lists.linaro.org Date: Fri, 15 Jul 2016 18:32:58 +0100 Message-Id: <20160715173259.23492-2-evan.lloyd@arm.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20160715173259.23492-1-evan.lloyd@arm.com> References: <20160715173259.23492-1-evan.lloyd@arm.com> Subject: [Linaro-uefi] [PATCH 1/2] Platforms/ARM/Juno: Acpi - update DBG2 to aslc. X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" From: Evan Lloyd Amend the Debug Port 2 Table to aslc rather than TDL. This patch replaces the Dbg2.asl file which described the DBG2 table in TDL format with Dbg2.aslc which introduces the option of using EDK2 build defined PCDs. Using PCDs will allow for future improvements. No functional changes are made by this change, it is a preliminary step towards introducing improvements to allow build time modifications for bug fixes, etc. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Evan Lloyd --- Platforms/ARM/Juno/AcpiTables/AcpiTables.inf | 2 +- Platforms/ARM/Juno/AcpiTables/Dbg2.asl | 72 --------------- Platforms/ARM/Juno/AcpiTables/Dbg2.aslc | 92 ++++++++++++++++++++ 3 files changed, 93 insertions(+), 73 deletions(-) diff --git a/Platforms/ARM/Juno/AcpiTables/AcpiTables.inf b/Platforms/ARM/Juno/AcpiTables/AcpiTables.inf index d62068d65846d9032bc0771cfa7c80e7fd559ee3..2b063fbfb22781d7dc749b25a3ee5c7ca84d56e6 100644 --- a/Platforms/ARM/Juno/AcpiTables/AcpiTables.inf +++ b/Platforms/ARM/Juno/AcpiTables/AcpiTables.inf @@ -23,7 +23,7 @@ [Defines] [Sources] Dsdt.asl - Dbg2.asl + Dbg2.aslc Spcr.aslc Fadt.aslc Gtdt.aslc diff --git a/Platforms/ARM/Juno/AcpiTables/Dbg2.asl b/Platforms/ARM/Juno/AcpiTables/Dbg2.asl deleted file mode 100644 index f57fa7e28a3bc34f112dec17cac8f1c27490ab4c..0000000000000000000000000000000000000000 --- a/Platforms/ARM/Juno/AcpiTables/Dbg2.asl +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Copyright (c) 2015, Graeme Gregory - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - * NB: This License is also known as the "BSD 2-Clause License". - * - * - * [DBG2] ACPI Table - * - */ - -[0004] Signature : "DBG2" [Debug Port table type 2] -[0004] Table Length : 0000005A -[0001] Revision : 00 -[0001] Checksum : 06 -[0006] Oem ID : "LINARO" -[0008] Oem Table ID : "ARM-JUNO" -[0004] Oem Revision : 00000000 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20140926 - -[0004] Info Offset : 0000002C -[0004] Info Count : 00000001 - -[0001] Revision : 00 -[0002] Length : 002C -[0001] Register Count : 01 -[0002] Namepath Length : 0005 -[0002] Namepath Offset : 0026 -[0002] OEM Data Length : 0000 [Optional field not present] -[0002] OEM Data Offset : 0000 [Optional field not present] -[0002] Port Type : 8000 -[0002] Port Subtype : 0003 -[0002] Reserved : 0000 -[0002] Base Address Offset : 0016 -[0002] Address Size Offset : 0022 - -[000C] Base Address Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 20 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 03 [DWord Access:32] -[0008] Address : 000000007FF80000 - -[0004] Address Size : 00001000 - -[0004] Namepath : "COM1" -[0001] OEM Data : 00 diff --git a/Platforms/ARM/Juno/AcpiTables/Dbg2.aslc b/Platforms/ARM/Juno/AcpiTables/Dbg2.aslc new file mode 100644 index 0000000000000000000000000000000000000000..5621a98b91fdcaf425d86e27c418dda8ed3df4d5 --- /dev/null +++ b/Platforms/ARM/Juno/AcpiTables/Dbg2.aslc @@ -0,0 +1,92 @@ +/** @file +* DBG2 Table +* +* Copyright (c) 2012-2016, ARM Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include "ArmPlatform.h" +#include +#include +#include +#include +#include + +#pragma pack(1) + +#define DBG2_NUM_DEBUG_PORTS 1 +#define DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS 1 +#define DBG2_NAMESPACESTRING_FIELD_SIZE 8 +#define PL011_UART_LENGTH 0x1000 + +#define NAME_STR_UART1 {'C', 'O', 'M', '1', '\0', '\0', '\0', '\0'} + +typedef struct { + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device; + EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister; + UINT32 AddressSize; + UINT8 NameSpaceString[DBG2_NAMESPACESTRING_FIELD_SIZE]; +} DBG2_DEBUG_DEVICE_INFORMATION; + +typedef struct { + EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description; + DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo[DBG2_NUM_DEBUG_PORTS]; +} DBG2_TABLE; + + +#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen, UartNameStr) { \ + { \ + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION, /* UINT8 Revision */ \ + sizeof (DBG2_DEBUG_DEVICE_INFORMATION), /* UINT16 Length */ \ + NumReg, /* UINT8 NumberofGenericAddressRegisters */ \ + DBG2_NAMESPACESTRING_FIELD_SIZE, /* UINT16 NameSpaceStringLength */ \ + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString), /* UINT16 NameSpaceStringOffset */ \ + 0, /* UINT16 OemDataLength */ \ + 0, /* UINT16 OemDataOffset */ \ + EFI_ACPI_DBG2_PORT_TYPE_SERIAL, /* UINT16 Port Type */ \ + SubType, /* UINT16 Port Subtype */ \ + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, /* UINT8 Reserved[2] */ \ + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister), /* UINT16 BaseAddressRegister Offset */ \ + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize) /* UINT16 AddressSize Offset */ \ + }, \ + ARM_GAS32 (UartBase), /* EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \ + UartAddrLen, /* UINT32 AddressSize */ \ + UartNameStr /* UINT8 NameSpaceString[MAX_DBG2_NAME_LEN] */ \ + } + + +STATIC DBG2_TABLE Dbg2 = { + { + ARM_ACPI_HEADER (EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE, + DBG2_TABLE, + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION), + OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo), + DBG2_NUM_DEBUG_PORTS /* UINT32 NumberDbgDeviceInfo */ + }, + { + /* + * Kernel Debug Port + */ + DBG2_DEBUG_PORT_DDI (DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS, + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART, + 0x7FF80000, + PL011_UART_LENGTH, + NAME_STR_UART1), + } +}; + +#pragma pack() + +// +// Reference the table being generated to prevent the optimizer from removing +// the data structure from the executable +// +VOID* CONST ReferenceAcpiTable = &Dbg2;