| Message ID | 20230916220151.526140-5-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | tcg/loongarch64: Improvements for 128-bit load/store | expand |
On 2023/9/17 06:01, Richard Henderson wrote: > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > tcg/loongarch64/tcg-target.h | 8 ++++---- > tcg/loongarch64/tcg-target.c.inc | 8 +------- > 2 files changed, 5 insertions(+), 11 deletions(-) > > diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h > index 03017672f6..1bea15b02e 100644 > --- a/tcg/loongarch64/tcg-target.h > +++ b/tcg/loongarch64/tcg-target.h > @@ -29,6 +29,8 @@ > #ifndef LOONGARCH_TCG_TARGET_H > #define LOONGARCH_TCG_TARGET_H > > +#include "host/cpuinfo.h" > + > #define TCG_TARGET_INSN_UNIT_SIZE 4 > #define TCG_TARGET_NB_REGS 64 > > @@ -85,8 +87,6 @@ typedef enum { > TCG_VEC_TMP0 = TCG_REG_V23, > } TCGReg; > > -extern bool use_lsx_instructions; > - > /* used for function call generation */ > #define TCG_REG_CALL_STACK TCG_REG_SP > #define TCG_TARGET_STACK_ALIGN 16 > @@ -171,10 +171,10 @@ extern bool use_lsx_instructions; > #define TCG_TARGET_HAS_muluh_i64 1 > #define TCG_TARGET_HAS_mulsh_i64 1 > > -#define TCG_TARGET_HAS_qemu_ldst_i128 use_lsx_instructions > +#define TCG_TARGET_HAS_qemu_ldst_i128 (cpuinfo & CPUINFO_LSX) > > #define TCG_TARGET_HAS_v64 0 > -#define TCG_TARGET_HAS_v128 use_lsx_instructions > +#define TCG_TARGET_HAS_v128 (cpuinfo & CPUINFO_LSX) > #define TCG_TARGET_HAS_v256 0 > > #define TCG_TARGET_HAS_not_vec 1 > diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc > index 40074c46b8..52f2c26ce1 100644 > --- a/tcg/loongarch64/tcg-target.c.inc > +++ b/tcg/loongarch64/tcg-target.c.inc > @@ -32,8 +32,6 @@ > #include "../tcg-ldst.c.inc" > #include <asm/hwcap.h> > > -bool use_lsx_instructions; > - > #ifdef CONFIG_DEBUG_TCG > static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { > "zero", > @@ -2316,10 +2314,6 @@ static void tcg_target_init(TCGContext *s) > exit(EXIT_FAILURE); > } > > - if (hwcap & HWCAP_LOONGARCH_LSX) { > - use_lsx_instructions = 1; > - } > - > tcg_target_available_regs[TCG_TYPE_I32] = ALL_GENERAL_REGS; > tcg_target_available_regs[TCG_TYPE_I64] = ALL_GENERAL_REGS; > > @@ -2335,7 +2329,7 @@ static void tcg_target_init(TCGContext *s) > tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S8); > tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S9); > > - if (use_lsx_instructions) { > + if (cpuinfo & CPUINFO_LSX) { > tcg_target_available_regs[TCG_TYPE_V128] = ALL_VECTOR_REGS; > tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_V24); > tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_V25); Reviewed-by: Jiajie Chen <c@jia.je>
diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h index 03017672f6..1bea15b02e 100644 --- a/tcg/loongarch64/tcg-target.h +++ b/tcg/loongarch64/tcg-target.h @@ -29,6 +29,8 @@ #ifndef LOONGARCH_TCG_TARGET_H #define LOONGARCH_TCG_TARGET_H +#include "host/cpuinfo.h" + #define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_NB_REGS 64 @@ -85,8 +87,6 @@ typedef enum { TCG_VEC_TMP0 = TCG_REG_V23, } TCGReg; -extern bool use_lsx_instructions; - /* used for function call generation */ #define TCG_REG_CALL_STACK TCG_REG_SP #define TCG_TARGET_STACK_ALIGN 16 @@ -171,10 +171,10 @@ extern bool use_lsx_instructions; #define TCG_TARGET_HAS_muluh_i64 1 #define TCG_TARGET_HAS_mulsh_i64 1 -#define TCG_TARGET_HAS_qemu_ldst_i128 use_lsx_instructions +#define TCG_TARGET_HAS_qemu_ldst_i128 (cpuinfo & CPUINFO_LSX) #define TCG_TARGET_HAS_v64 0 -#define TCG_TARGET_HAS_v128 use_lsx_instructions +#define TCG_TARGET_HAS_v128 (cpuinfo & CPUINFO_LSX) #define TCG_TARGET_HAS_v256 0 #define TCG_TARGET_HAS_not_vec 1 diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 40074c46b8..52f2c26ce1 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -32,8 +32,6 @@ #include "../tcg-ldst.c.inc" #include <asm/hwcap.h> -bool use_lsx_instructions; - #ifdef CONFIG_DEBUG_TCG static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "zero", @@ -2316,10 +2314,6 @@ static void tcg_target_init(TCGContext *s) exit(EXIT_FAILURE); } - if (hwcap & HWCAP_LOONGARCH_LSX) { - use_lsx_instructions = 1; - } - tcg_target_available_regs[TCG_TYPE_I32] = ALL_GENERAL_REGS; tcg_target_available_regs[TCG_TYPE_I64] = ALL_GENERAL_REGS; @@ -2335,7 +2329,7 @@ static void tcg_target_init(TCGContext *s) tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S8); tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S9); - if (use_lsx_instructions) { + if (cpuinfo & CPUINFO_LSX) { tcg_target_available_regs[TCG_TYPE_V128] = ALL_VECTOR_REGS; tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_V24); tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_V25);
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- tcg/loongarch64/tcg-target.h | 8 ++++---- tcg/loongarch64/tcg-target.c.inc | 8 +------- 2 files changed, 5 insertions(+), 11 deletions(-)