@@ -236,16 +236,10 @@ static unsigned int gicv2_read_irq(void)
return (readl_gicc(GICC_IAR) & GICC_IA_IRQ);
}
-/*
- * needs to be called with a valid cpu_mask, ie each cpu in the mask has
- * already called gic_cpu_init
- */
static void gicv2_set_irq_properties(struct irq_desc *desc,
- const cpumask_t *cpu_mask,
- unsigned int priority)
+ unsigned int priority)
{
uint32_t cfg, actual, edgebit;
- unsigned int mask = gicv2_cpu_mask(cpu_mask);
unsigned int irq = desc->irq;
unsigned int type = desc->arch.type;
@@ -276,8 +270,6 @@ static void gicv2_set_irq_properties(struct irq_desc *desc,
IRQ_TYPE_LEVEL_HIGH;
}
- /* Set target CPU mask (RAZ/WI on uniprocessor) */
- writeb_gicd(mask, GICD_ITARGETSR + irq);
/* Set priority */
writeb_gicd(priority, GICD_IPRIORITYR + irq);
@@ -472,13 +472,10 @@ static inline uint64_t gicv3_mpidr_to_affinity(int cpu)
}
static void gicv3_set_irq_properties(struct irq_desc *desc,
- const cpumask_t *cpu_mask,
unsigned int priority)
{
uint32_t cfg, actual, edgebit;
- uint64_t affinity;
void __iomem *base;
- unsigned int cpu = gicv3_get_cpu_from_mask(cpu_mask);
unsigned int irq = desc->irq;
unsigned int type = desc->arch.type;
@@ -516,13 +513,6 @@ static void gicv3_set_irq_properties(struct irq_desc *desc,
IRQ_TYPE_LEVEL_HIGH;
}
- affinity = gicv3_mpidr_to_affinity(cpu);
- /* Make sure we don't broadcast the interrupt */
- affinity &= ~GICD_IROUTER_SPI_MODE_ANY;
-
- if ( irq >= NR_GIC_LOCAL_IRQS )
- writeq_relaxed(affinity, (GICD + GICD_IROUTER + irq * 8));
-
/* Set priority */
if ( irq < NR_GIC_LOCAL_IRQS )
writeb_relaxed(priority, GICD_RDIST_SGI_BASE + GICR_IPRIORITYR0 + irq);
@@ -106,7 +106,8 @@ static void gic_set_irq_properties(struct irq_desc *desc,
const cpumask_t *cpu_mask,
unsigned int priority)
{
- gic_hw_ops->set_irq_properties(desc, cpu_mask, priority);
+ gic_hw_ops->set_irq_properties(desc, priority);
+ desc->handler->set_affinity(desc, cpu_mask);
}
/* Program the GIC to route an interrupt to the host (i.e. Xen)
@@ -331,7 +331,6 @@ struct gic_hw_operations {
unsigned int (*read_irq)(void);
/* Set IRQ property */
void (*set_irq_properties)(struct irq_desc *desc,
- const cpumask_t *cpu_mask,
unsigned int priority);
/* Send SGI */
void (*send_SGI)(enum gic_sgi sgi, enum gic_sgi_mode irqmode,
The code to set the IRQ affinity is duplicated: once in gicv{2,3}_set_properties and the other is gicv{2,3}_irq_set_affinity. Remove the code from gicv{2,3}_set_properties and call directly the affinity set helper from the common code. Signed-off-by: Julien Grall <julien.grall@arm.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> --- Changes in v2: - Add Stefano's reviewed-by --- xen/arch/arm/gic-v2.c | 10 +--------- xen/arch/arm/gic-v3.c | 10 ---------- xen/arch/arm/gic.c | 3 ++- xen/include/asm-arm/gic.h | 1 - 4 files changed, 3 insertions(+), 21 deletions(-)