@@ -97,24 +97,19 @@ void gic_restore_state(struct vcpu *v)
}
/*
- * needs to be called with a valid cpu_mask, ie each cpu in the mask has
- * already called gic_cpu_init
* - desc.lock must be held
* - arch.type must be valid (i.e != IRQ_TYPE_INVALID)
*/
static void gic_set_irq_properties(struct irq_desc *desc,
- const cpumask_t *cpu_mask,
unsigned int priority)
{
gic_hw_ops->set_irq_properties(desc, priority);
- desc->handler->set_affinity(desc, cpu_mask);
}
/* Program the GIC to route an interrupt to the host (i.e. Xen)
* - needs to be called with desc.lock held
*/
-void gic_route_irq_to_xen(struct irq_desc *desc, const cpumask_t *cpu_mask,
- unsigned int priority)
+void gic_route_irq_to_xen(struct irq_desc *desc, unsigned int priority)
{
ASSERT(priority <= 0xff); /* Only 8 bits of priority */
ASSERT(desc->irq < gic_number_lines());/* Can't route interrupts that don't exist */
@@ -123,7 +118,7 @@ void gic_route_irq_to_xen(struct irq_desc *desc, const cpumask_t *cpu_mask,
desc->handler = gic_hw_ops->gic_host_irq_type;
- gic_set_irq_properties(desc, cpu_mask, priority);
+ gic_set_irq_properties(desc, priority);
}
/* Program the GIC to route an interrupt to a guest
@@ -155,7 +150,7 @@ int gic_route_irq_to_guest(struct domain *d, unsigned int virq,
desc->handler = gic_hw_ops->gic_guest_irq_type;
set_bit(_IRQ_GUEST, &desc->status);
- gic_set_irq_properties(desc, cpumask_of(v_target->processor), priority);
+ gic_set_irq_properties(desc, priority);
p->desc = desc;
res = 0;
@@ -370,6 +370,7 @@ int setup_irq(unsigned int irq, unsigned int irqflags, struct irqaction *new)
/* First time the IRQ is setup */
if ( disabled )
{
+ gic_route_irq_to_xen(desc, GIC_PRI_IRQ);
/* It's fine to use smp_processor_id() because:
* For PPI: irq_desc is banked
* For SPI: we don't care for now which CPU will receive the
@@ -377,8 +378,7 @@ int setup_irq(unsigned int irq, unsigned int irqflags, struct irqaction *new)
* TODO: Handle case where SPI is setup on different CPU than
* the targeted CPU and the priority.
*/
- gic_route_irq_to_xen(desc, cpumask_of(smp_processor_id()),
- GIC_PRI_IRQ);
+ irq_set_affinity(desc, cpumask_of(smp_processor_id()));
desc->handler->startup(desc);
}
@@ -223,8 +223,7 @@ enum gic_version {
extern enum gic_version gic_hw_version(void);
/* Program the GIC to route an interrupt */
-extern void gic_route_irq_to_xen(struct irq_desc *desc, const cpumask_t *cpu_mask,
- unsigned int priority);
+extern void gic_route_irq_to_xen(struct irq_desc *desc, unsigned int priority);
extern int gic_route_irq_to_guest(struct domain *, unsigned int virq,
struct irq_desc *desc,
unsigned int priority);
The affinity of a guest IRQ is set every time the guest enable it (see vgic_enable_irqs). It is not necessary to set the affinity when the IRQ is routed to the guest because Xen will never receive the IRQ until it hass been enabled by the guest. To keep gic_route_irq_to_{xen,guest} behaving the same way (i.e just setting up the routing), the affinity of IRQ routed to Xen is moved into __setup_irq. Signed-off-by: Julien grall <julien.grall@arm.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> --- Changes in v3: - Add Stefano's reviewed-by Changes in v2: - Patch renamed - Set the affinity for IRQ routed to Xen in __setup_irq --- xen/arch/arm/gic.c | 11 +++-------- xen/arch/arm/irq.c | 4 ++-- xen/include/asm-arm/gic.h | 3 +-- 3 files changed, 6 insertions(+), 12 deletions(-)