diff mbox series

[v2] dt-bindings: soc: altera: convert socfpga-system.txt to yaml

Message ID 20231014112905.1512650-1-niravkumar.l.rabara@intel.com
State New
Headers show
Series [v2] dt-bindings: soc: altera: convert socfpga-system.txt to yaml | expand

Commit Message

niravkumar.l.rabara@intel.com Oct. 14, 2023, 11:29 a.m. UTC
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>

Convert socfpga-system.txt to altr,socfpga-sys-mgr.yaml and move to
soc directory.

Add platform names in description for clarity. ARM(32-bit) platforms
Cyclone5, Arria5 and Arria10 is using "altr,sys-mgr" compatible,
while ARM64 is using "altr,sys-mgr-s10" compatible.
Removed "cpu1-start-addr" for ARM64 as it is not required.

Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---

Changes in v2:
- Added detail description of changes in commit message.
- Moved coverted yaml file to soc folder.  

 .../bindings/arm/altera/socfpga-system.txt    | 25 ---------
 .../soc/altera/altr,socfpga-sys-mgr.yaml      | 51 +++++++++++++++++++
 2 files changed, 51 insertions(+), 25 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-system.txt
 create mode 100644 Documentation/devicetree/bindings/soc/altera/altr,socfpga-sys-mgr.yaml

Comments

Rob Herring Oct. 17, 2023, 7:21 p.m. UTC | #1
On Sat, Oct 14, 2023 at 07:29:05PM +0800, niravkumar.l.rabara@intel.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> 
> Convert socfpga-system.txt to altr,socfpga-sys-mgr.yaml and move to
> soc directory.
> 
> Add platform names in description for clarity. ARM(32-bit) platforms
> Cyclone5, Arria5 and Arria10 is using "altr,sys-mgr" compatible,
> while ARM64 is using "altr,sys-mgr-s10" compatible.
> Removed "cpu1-start-addr" for ARM64 as it is not required.
> 
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
> 
> Changes in v2:
> - Added detail description of changes in commit message.
> - Moved coverted yaml file to soc folder.  
> 
>  .../bindings/arm/altera/socfpga-system.txt    | 25 ---------
>  .../soc/altera/altr,socfpga-sys-mgr.yaml      | 51 +++++++++++++++++++

altr,sys-mgr.yaml


>  2 files changed, 51 insertions(+), 25 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-system.txt
>  create mode 100644 Documentation/devicetree/bindings/soc/altera/altr,socfpga-sys-mgr.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt
> deleted file mode 100644
> index 82edbaaa3f85..000000000000
> --- a/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt
> +++ /dev/null
> @@ -1,25 +0,0 @@
> -Altera SOCFPGA System Manager
> -
> -Required properties:
> -- compatible : "altr,sys-mgr"
> -- reg : Should contain 1 register ranges(address and length)
> -- cpu1-start-addr : CPU1 start address in hex.
> -
> -Example:
> -	 sysmgr@ffd08000 {
> -		compatible = "altr,sys-mgr";
> -		reg = <0xffd08000 0x1000>;
> -		cpu1-start-addr = <0xffd080c4>;
> -	};
> -
> -ARM64 - Stratix10
> -Required properties:
> -- compatible : "altr,sys-mgr-s10"
> -- reg : Should contain 1 register range(address and length)
> -        for system manager register.
> -
> -Example:
> -	 sysmgr@ffd12000 {
> -		compatible = "altr,sys-mgr-s10";
> -		reg = <0xffd12000 0x228>;
> -	};
> diff --git a/Documentation/devicetree/bindings/soc/altera/altr,socfpga-sys-mgr.yaml b/Documentation/devicetree/bindings/soc/altera/altr,socfpga-sys-mgr.yaml
> new file mode 100644
> index 000000000000..b8bf63bba567
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/altera/altr,socfpga-sys-mgr.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/altera/altr,socfpga-sys-mgr.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Altera SOCFPGA System Manager
> +
> +maintainers:
> +  - Dinh Nguyen <dinguyen@kernel.org>
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - description: Cyclone5/Arria5/Arria10
> +        const: altr,sys-mgr
> +      - description: Stratix10 SoC
> +        items:
> +          - const: altr,sys-mgr-s10
> +          - const: altr,sys-mgr
> +
> +  reg:
> +    maxItems: 1
> +
> +  cpu1-start-addr:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description: CPU1 start address in hex
> +
> +required:
> +  - compatible
> +  - reg
> +
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: altr,sys-mgr-s10
> +    then:
> +      properties:
> +        cpu1-start-addr: false
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    sysmgr@ffd08000 {
> +      compatible = "altr,sys-mgr";
> +      reg = <0xffd08000 0x1000>;
> +      cpu1-start-addr = <0xffd080c4>;
> +    };
> -- 
> 2.25.1
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt
deleted file mode 100644
index 82edbaaa3f85..000000000000
--- a/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt
+++ /dev/null
@@ -1,25 +0,0 @@ 
-Altera SOCFPGA System Manager
-
-Required properties:
-- compatible : "altr,sys-mgr"
-- reg : Should contain 1 register ranges(address and length)
-- cpu1-start-addr : CPU1 start address in hex.
-
-Example:
-	 sysmgr@ffd08000 {
-		compatible = "altr,sys-mgr";
-		reg = <0xffd08000 0x1000>;
-		cpu1-start-addr = <0xffd080c4>;
-	};
-
-ARM64 - Stratix10
-Required properties:
-- compatible : "altr,sys-mgr-s10"
-- reg : Should contain 1 register range(address and length)
-        for system manager register.
-
-Example:
-	 sysmgr@ffd12000 {
-		compatible = "altr,sys-mgr-s10";
-		reg = <0xffd12000 0x228>;
-	};
diff --git a/Documentation/devicetree/bindings/soc/altera/altr,socfpga-sys-mgr.yaml b/Documentation/devicetree/bindings/soc/altera/altr,socfpga-sys-mgr.yaml
new file mode 100644
index 000000000000..b8bf63bba567
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/altera/altr,socfpga-sys-mgr.yaml
@@ -0,0 +1,51 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/altera/altr,socfpga-sys-mgr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Altera SOCFPGA System Manager
+
+maintainers:
+  - Dinh Nguyen <dinguyen@kernel.org>
+
+properties:
+  compatible:
+    oneOf:
+      - description: Cyclone5/Arria5/Arria10
+        const: altr,sys-mgr
+      - description: Stratix10 SoC
+        items:
+          - const: altr,sys-mgr-s10
+          - const: altr,sys-mgr
+
+  reg:
+    maxItems: 1
+
+  cpu1-start-addr:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: CPU1 start address in hex
+
+required:
+  - compatible
+  - reg
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: altr,sys-mgr-s10
+    then:
+      properties:
+        cpu1-start-addr: false
+
+additionalProperties: false
+
+examples:
+  - |
+    sysmgr@ffd08000 {
+      compatible = "altr,sys-mgr";
+      reg = <0xffd08000 0x1000>;
+      cpu1-start-addr = <0xffd080c4>;
+    };