deleted file mode 100644
@@ -1,85 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-#include <Library/PcdLib.h>
-
-.text
-.align 3
-
-.globl ASM_PFX(CEntryPoint)
-GCC_ASM_EXPORT(_ModuleEntryPoint)
-
-ASM_PFX(_ModuleEntryPoint):
-
- //Disable L2 cache
- mrc p15, 0, r0, c1, c0, 1 // read Auxiliary Control Register
- bic r0, r0, #0x00000002 // disable L2 cache
- mcr p15, 0, r0, c1, c0, 1 // store Auxiliary Control Register
-
- //Enable Strict alignment checking & Instruction cache
- mrc p15, 0, r0, c1, c0, 0
- bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
- bic r0, r0, #0x00000005 /* clear bits 0, 2 (---- -C-M) */
- orr r0, r0, #0x00000002 /* set bit 1 (A) Align */
- orr r0, r0, #0x00001000 /* set bit 12 (I) enable I-Cache */
- mcr p15, 0, r0, c1, c0, 0
-
- // Enable NEON register in case folks want to use them for optimizations (CopyMem)
- mrc p15, 0, r0, c1, c0, 2
- orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
- mcr p15, 0, r0, c1, c0, 2
- mov r0, #0x40000000 // Set EN bit in FPEXC
- mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
-
-
- // Set CPU vectors to start of DRAM
- LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
- mcr p15, 0, r0, c12, c0, 0
- isb // Sync changes to control registers
-
- // Fill vector table with branchs to current pc (jmp $)
- ldr r1, ShouldNeverGetHere
- movs r2, #0
-FillVectors:
- str r1, [r0, r2]
- adds r2, r2, #4
- cmp r2, #32
- bne FillVectors
-
- /* before we call C code, lets setup the stack pointer in internal RAM */
-stack_pointer_setup:
-
- //
- // Set stack based on PCD values. Need to do it this way to make C code work
- // when it runs from FLASH.
- //
- LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) /* stack base arg2 */
- LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) /* stack size arg3 */
- add r4, r2, r3
-
- //Enter SVC mode and set up SVC stack pointer
- mov r0,#0x13|0x80|0x40
- msr CPSR_c,r0
- mov r13,r4
-
- // Call C entry point
- LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) /* memory size arg1 */
- LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) /* memory size arg0 */
- blx ASM_PFX(CEntryPoint) /* Assume C code is thumb */
-
-ShouldNeverGetHere:
- /* _CEntryPoint should never return */
- b ShouldNeverGetHere
-
deleted file mode 100644
@@ -1,89 +0,0 @@
-//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
- INCLUDE AsmMacroIoLib.inc
-
- IMPORT CEntryPoint
- EXPORT _ModuleEntryPoint
-
- PRESERVE8
- AREA ModuleEntryPoint, CODE, READONLY
-
-
-_ModuleEntryPoint
-
- //Disable L2 cache
- mrc p15, 0, r0, c1, c0, 1 // read Auxiliary Control Register
- bic r0, r0, #0x00000002 // disable L2 cache
- mcr p15, 0, r0, c1, c0, 1 // store Auxiliary Control Register
-
- //Enable Strict alignment checking & Instruction cache
- mrc p15, 0, r0, c1, c0, 0
- bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
- bic r0, r0, #0x00000005 /* clear bits 0, 2 (---- -C-M) */
- orr r0, r0, #0x00000002 /* set bit 1 (A) Align */
- orr r0, r0, #0x00001000 /* set bit 12 (I) enable I-Cache */
- mcr p15, 0, r0, c1, c0, 0
-
- // Enable NEON register in case folks want to use them for optimizations (CopyMem)
- mrc p15, 0, r0, c1, c0, 2
- orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
- mcr p15, 0, r0, c1, c0, 2
- mov r0, #0x40000000 // Set EN bit in FPEXC
- msr FPEXC,r0
-
- // Set CPU vectors to start of DRAM
- LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
- mcr p15, 0, r0, c12, c0, 0
- isb // Sync changes to control registers
-
- // Fill vector table with branchs to current pc (jmp $)
- ldr r1, ShouldNeverGetHere
- movs r2, #0
-FillVectors
- str r1, [r0, r2]
- adds r2, r2, #4
- cmp r2, #32
- bne FillVectors
-
- /* before we call C code, lets setup the stack pointer in internal RAM */
-stack_pointer_setup
-
- //
- // Set stack based on PCD values. Need to do it this way to make C code work
- // when it runs from FLASH.
- //
- LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2
- LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3
- add r4, r2, r3
-
- //Enter SVC mode and set up SVC stack pointer
- mov r5,#0x13|0x80|0x40
- msr CPSR_c,r5
- mov r13,r4
-
- // Call C entry point
- LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1
- LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory start arg0
- blx CEntryPoint // Assume C code is thumb
-
-ShouldNeverGetHere
- /* _CEntryPoint should never return */
- b ShouldNeverGetHere
-
- END
-
deleted file mode 100644
@@ -1,80 +0,0 @@
-/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-
-#include <Library/ArmLib.h>
-#include <Library/ArmMmuLib.h>
-#include <Library/PrePiLib.h>
-#include <Library/PcdLib.h>
-
-// DDR attributes
-#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
-#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
-
-// SoC registers. L3 interconnects
-#define SOC_REGISTERS_L3_PHYSICAL_BASE 0x68000000
-#define SOC_REGISTERS_L3_PHYSICAL_LENGTH 0x08000000
-#define SOC_REGISTERS_L3_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
-
-// SoC registers. L4 interconnects
-#define SOC_REGISTERS_L4_PHYSICAL_BASE 0x48000000
-#define SOC_REGISTERS_L4_PHYSICAL_LENGTH 0x08000000
-#define SOC_REGISTERS_L4_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
-
-VOID
-InitCache (
- IN UINT32 MemoryBase,
- IN UINT32 MemoryLength
- )
-{
- UINT32 CacheAttributes;
- ARM_MEMORY_REGION_DESCRIPTOR MemoryTable[5];
- VOID *TranslationTableBase;
- UINTN TranslationTableSize;
-
- if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
- CacheAttributes = DDR_ATTRIBUTES_CACHED;
- } else {
- CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
- }
-
- // DDR
- MemoryTable[0].PhysicalBase = MemoryBase;
- MemoryTable[0].VirtualBase = MemoryBase;
- MemoryTable[0].Length = MemoryLength;
- MemoryTable[0].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
-
- // SOC Registers. L3 interconnects
- MemoryTable[1].PhysicalBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
- MemoryTable[1].VirtualBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
- MemoryTable[1].Length = SOC_REGISTERS_L3_PHYSICAL_LENGTH;
- MemoryTable[1].Attributes = SOC_REGISTERS_L3_ATTRIBUTES;
-
- // SOC Registers. L4 interconnects
- MemoryTable[2].PhysicalBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
- MemoryTable[2].VirtualBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
- MemoryTable[2].Length = SOC_REGISTERS_L4_PHYSICAL_LENGTH;
- MemoryTable[2].Attributes = SOC_REGISTERS_L4_ATTRIBUTES;
-
- // End of Table
- MemoryTable[3].PhysicalBase = 0;
- MemoryTable[3].VirtualBase = 0;
- MemoryTable[3].Length = 0;
- MemoryTable[3].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
-
- ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
-
- BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
-}
deleted file mode 100644
@@ -1,70 +0,0 @@
-/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Library/IoLib.h>
-#include <Library/DebugLib.h>
-
-#include <Omap3530/Omap3530.h>
-
-VOID
-ClockInit (
- VOID
- )
-{
- //DPLL1 - DPLL4 are configured part of Configuration header which OMAP3 ROM parses.
-
- // Enable PLL5 and set to 120 MHz as a reference clock.
- MmioWrite32 (CM_CLKSEL4_PLL, CM_CLKSEL_PLL_MULT(120) | CM_CLKSEL_PLL_DIV(13));
- MmioWrite32 (CM_CLKSEL5_PLL, CM_CLKSEL_DIV_120M(1));
- MmioWrite32 (CM_CLKEN2_PLL, CM_CLKEN_FREQSEL_075_100 | CM_CLKEN_ENABLE);
-
- // Turn on functional & interface clocks to the USBHOST power domain
- MmioOr32(CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE
- | CM_FCLKEN_USBHOST_EN_USBHOST1_ENABLE);
- MmioOr32(CM_ICLKEN_USBHOST, CM_ICLKEN_USBHOST_EN_USBHOST_ENABLE);
-
- // Turn on functional & interface clocks to the USBTLL block.
- MmioOr32(CM_FCLKEN3_CORE, CM_FCLKEN3_CORE_EN_USBTLL_ENABLE);
- MmioOr32(CM_ICLKEN3_CORE, CM_ICLKEN3_CORE_EN_USBTLL_ENABLE);
-
- // Turn on functional & interface clocks to MMC1 and I2C1 modules.
- MmioOr32(CM_FCLKEN1_CORE, CM_FCLKEN1_CORE_EN_MMC1_ENABLE
- | CM_FCLKEN1_CORE_EN_I2C1_ENABLE);
- MmioOr32(CM_ICLKEN1_CORE, CM_ICLKEN1_CORE_EN_MMC1_ENABLE
- | CM_ICLKEN1_CORE_EN_I2C1_ENABLE);
-
- // Turn on functional & interface clocks to various Peripherals.
- MmioOr32(CM_FCLKEN_PER, CM_FCLKEN_PER_EN_UART3_ENABLE
- | CM_FCLKEN_PER_EN_GPT3_ENABLE
- | CM_FCLKEN_PER_EN_GPT4_ENABLE
- | CM_FCLKEN_PER_EN_GPIO2_ENABLE
- | CM_FCLKEN_PER_EN_GPIO3_ENABLE
- | CM_FCLKEN_PER_EN_GPIO4_ENABLE
- | CM_FCLKEN_PER_EN_GPIO5_ENABLE
- | CM_FCLKEN_PER_EN_GPIO6_ENABLE);
- MmioOr32(CM_ICLKEN_PER, CM_ICLKEN_PER_EN_UART3_ENABLE
- | CM_ICLKEN_PER_EN_GPT3_ENABLE
- | CM_ICLKEN_PER_EN_GPT4_ENABLE
- | CM_ICLKEN_PER_EN_GPIO2_ENABLE
- | CM_ICLKEN_PER_EN_GPIO3_ENABLE
- | CM_ICLKEN_PER_EN_GPIO4_ENABLE
- | CM_ICLKEN_PER_EN_GPIO5_ENABLE
- | CM_ICLKEN_PER_EN_GPIO6_ENABLE);
-
- // Turn on functional & inteface clocks to various wakeup modules.
- MmioOr32(CM_FCLKEN_WKUP, CM_FCLKEN_WKUP_EN_GPIO1_ENABLE
- | CM_FCLKEN_WKUP_EN_WDT2_ENABLE);
- MmioOr32(CM_ICLKEN_WKUP, CM_ICLKEN_WKUP_EN_GPIO1_ENABLE
- | CM_ICLKEN_WKUP_EN_WDT2_ENABLE);
-}
deleted file mode 100644
@@ -1,103 +0,0 @@
-/** @file
- LZMA Decompress Library header file
-
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __LZMA_DECOMPRESS_H___
-#define __LZMA_DECOMPRESS_H___
-
-/**
- Examines a GUIDed section and returns the size of the decoded buffer and the
- size of an scratch buffer required to actually decode the data in a GUIDed section.
-
- Examines a GUIDed section specified by InputSection.
- If GUID for InputSection does not match the GUID that this handler supports,
- then RETURN_UNSUPPORTED is returned.
- If the required information can not be retrieved from InputSection,
- then RETURN_INVALID_PARAMETER is returned.
- If the GUID of InputSection does match the GUID that this handler supports,
- then the size required to hold the decoded buffer is returned in OututBufferSize,
- the size of an optional scratch buffer is returned in ScratchSize, and the Attributes field
- from EFI_GUID_DEFINED_SECTION header of InputSection is returned in SectionAttribute.
-
- If InputSection is NULL, then ASSERT().
- If OutputBufferSize is NULL, then ASSERT().
- If ScratchBufferSize is NULL, then ASSERT().
- If SectionAttribute is NULL, then ASSERT().
-
-
- @param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.
- @param[out] OutputBufferSize A pointer to the size, in bytes, of an output buffer required
- if the buffer specified by InputSection were decoded.
- @param[out] ScratchBufferSize A pointer to the size, in bytes, required as scratch space
- if the buffer specified by InputSection were decoded.
- @param[out] SectionAttribute A pointer to the attributes of the GUIDed section. See the Attributes
- field of EFI_GUID_DEFINED_SECTION in the PI Specification.
-
- @retval RETURN_SUCCESS The information about InputSection was returned.
- @retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.
- @retval RETURN_INVALID_PARAMETER The information can not be retrieved from the section specified by InputSection.
-
-**/
-RETURN_STATUS
-EFIAPI
-LzmaGuidedSectionGetInfo (
- IN CONST VOID *InputSection,
- OUT UINT32 *OutputBufferSize,
- OUT UINT32 *ScratchBufferSize,
- OUT UINT16 *SectionAttribute
- );
-
-/**
- Decompress a LZAM compressed GUIDed section into a caller allocated output buffer.
-
- Decodes the GUIDed section specified by InputSection.
- If GUID for InputSection does not match the GUID that this handler supports, then RETURN_UNSUPPORTED is returned.
- If the data in InputSection can not be decoded, then RETURN_INVALID_PARAMETER is returned.
- If the GUID of InputSection does match the GUID that this handler supports, then InputSection
- is decoded into the buffer specified by OutputBuffer and the authentication status of this
- decode operation is returned in AuthenticationStatus. If the decoded buffer is identical to the
- data in InputSection, then OutputBuffer is set to point at the data in InputSection. Otherwise,
- the decoded data will be placed in caller allocated buffer specified by OutputBuffer.
-
- If InputSection is NULL, then ASSERT().
- If OutputBuffer is NULL, then ASSERT().
- If ScratchBuffer is NULL and this decode operation requires a scratch buffer, then ASSERT().
- If AuthenticationStatus is NULL, then ASSERT().
-
-
- @param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.
- @param[out] OutputBuffer A pointer to a buffer that contains the result of a decode operation.
- @param[out] ScratchBuffer A caller allocated buffer that may be required by this function
- as a scratch buffer to perform the decode operation.
- @param[out] AuthenticationStatus
- A pointer to the authentication status of the decoded output buffer.
- See the definition of authentication status in the EFI_PEI_GUIDED_SECTION_EXTRACTION_PPI
- section of the PI Specification. EFI_AUTH_STATUS_PLATFORM_OVERRIDE must
- never be set by this handler.
-
- @retval RETURN_SUCCESS The buffer specified by InputSection was decoded.
- @retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.
- @retval RETURN_INVALID_PARAMETER The section specified by InputSection can not be decoded.
-
-**/
-RETURN_STATUS
-EFIAPI
-LzmaGuidedSectionExtraction (
- IN CONST VOID *InputSection,
- OUT VOID **OutputBuffer,
- OUT VOID *ScratchBuffer, OPTIONAL
- OUT UINT32 *AuthenticationStatus
- );
-
-#endif // __LZMADECOMPRESS_H__
-
deleted file mode 100644
@@ -1,282 +0,0 @@
-/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-#include <Library/IoLib.h>
-#include <Library/DebugLib.h>
-#include <Omap3530/Omap3530.h>
-
-#define NUM_PINS 238
-
-PAD_CONFIGURATION PadConfigurationTable[NUM_PINS] = {
- //Pin, MuxMode, PullConfig, InputEnable
- { SDRC_D0, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D1, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D2, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D3, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D4, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D5, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D6, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D7, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D8, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D9, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D10, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D11, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D12, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D13, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D14, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D15, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D16, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D17, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D18, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D19, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D20, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D21, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D22, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D23, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D24, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D25, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D26, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D27, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D28, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D29, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D30, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D31, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_CLK, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_DQS0, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_CKE0, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { SDRC_CKE1, MUXMODE7, PULL_DISABLED, INPUT },
- { SDRC_DQS1, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_DQS2, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_DQS3, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_A1, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A2, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A3, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A4, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A5, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A6, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A7, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A8, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A9, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A10, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_D0, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D1, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D2, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D3, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D4, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D5, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D6, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D7, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D8, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D9, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D10, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D11, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D12, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D13, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D14, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D15, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_NCS0, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_NCS1, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
- { GPMC_NCS2, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
- { GPMC_NCS3, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
- { GPMC_NCS4, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
- { GPMC_NCS5, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_NCS6, MUXMODE1, PULL_DISABLED, INPUT },
- { GPMC_NCS7, MUXMODE1, PULL_UP_SELECTED, INPUT },
- { GPMC_CLK, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_NADV_ALE, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_NOE, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_NWE, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_NBE0_CLE, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_NBE1, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_NWP, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_WAIT0, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { GPMC_WAIT1, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { GPMC_WAIT2, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { GPMC_WAIT3, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { DSS_PCLK, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_HSYNC, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_PSYNC, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_ACBIAS, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA0, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA1, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA2, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA3, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA4, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA5, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA6, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA7, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA8, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA9, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA10, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA11, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA12, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA13, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA14, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA15, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA16, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA17, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA18, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA19, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA20, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA21, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA22, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA23, MUXMODE0, PULL_DISABLED, OUTPUT },
- { CAM_HS, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { CAM_VS, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { CAM_XCLKA, MUXMODE0, PULL_DISABLED, OUTPUT },
- { CAM_PCLK, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { CAM_FLD, MUXMODE4, PULL_DISABLED, OUTPUT },
- { CAM_D0, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D1, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D2, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D3, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D4, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D5, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D6, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D7, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D8, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D9, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D10, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D11, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_XCLKB, MUXMODE0, PULL_DISABLED, OUTPUT },
- { CAM_WEN, MUXMODE4, PULL_DISABLED, INPUT },
- { CAM_STROBE, MUXMODE0, PULL_DISABLED, OUTPUT },
- { CSI2_DX0, MUXMODE0, PULL_DISABLED, INPUT },
- { CSI2_DY0, MUXMODE0, PULL_DISABLED, INPUT },
- { CSI2_DX1, MUXMODE0, PULL_DISABLED, INPUT },
- { CSI2_DY1, MUXMODE0, PULL_DISABLED, INPUT },
- { MCBSP2_FSX, MUXMODE0, PULL_DISABLED, INPUT },
- { MCBSP2_CLKX, MUXMODE0, PULL_DISABLED, INPUT },
- { MCBSP2_DR, MUXMODE0, PULL_DISABLED, INPUT },
- { MCBSP2_DX, MUXMODE0, PULL_DISABLED, OUTPUT },
- { MMC1_CLK, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
- { MMC1_CMD, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC1_DAT0, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC1_DAT1, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC1_DAT2, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC1_DAT3, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC1_DAT4, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC1_DAT5, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC1_DAT6, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC1_DAT7, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC2_CLK, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_CMD, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_DAT0, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_DAT1, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_DAT2, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_DAT3, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_DAT4, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_DAT5, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_DAT6, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_DAT7, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MCBSP3_DX, MUXMODE4, PULL_DISABLED, OUTPUT },
- { MCBSP3_DR, MUXMODE4, PULL_DISABLED, OUTPUT },
- { MCBSP3_CLKX, MUXMODE4, PULL_DISABLED, OUTPUT },
- { MCBSP3_FSX, MUXMODE4, PULL_DISABLED, OUTPUT },
- { UART2_CTS, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { UART2_RTS, MUXMODE0, PULL_DISABLED, OUTPUT },
- { UART2_TX, MUXMODE0, PULL_DISABLED, OUTPUT },
- { UART2_RX, MUXMODE4, PULL_DISABLED, OUTPUT },
- { UART1_TX, MUXMODE0, PULL_DISABLED, OUTPUT },
- { UART1_RTS, MUXMODE4, PULL_DISABLED, OUTPUT },
- { UART1_CTS, MUXMODE4, PULL_DISABLED, OUTPUT },
- { UART1_RX, MUXMODE0, PULL_DISABLED, INPUT },
- { MCBSP4_CLKX, MUXMODE1, PULL_DISABLED, INPUT },
- { MCBSP4_DR, MUXMODE1, PULL_DISABLED, INPUT },
- { MCBSP4_DX, MUXMODE1, PULL_DISABLED, INPUT },
- { MCBSP4_FSX, MUXMODE1, PULL_DISABLED, INPUT },
- { MCBSP1_CLKR, MUXMODE4, PULL_DISABLED, OUTPUT },
- { MCBSP1_FSR, MUXMODE4, PULL_UP_SELECTED, OUTPUT },
- { MCBSP1_DX, MUXMODE4, PULL_DISABLED, OUTPUT },
- { MCBSP1_DR, MUXMODE4, PULL_DISABLED, OUTPUT },
- { MCBSP1_CLKS, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MCBSP1_FSX, MUXMODE4, PULL_DISABLED, OUTPUT },
- { MCBSP1_CLKX, MUXMODE4, PULL_DISABLED, OUTPUT },
- { UART3_CTS_RCTX,MUXMODE0, PULL_UP_SELECTED, INPUT },
- { UART3_RTS_SD, MUXMODE0, PULL_DISABLED, OUTPUT },
- { UART3_RX_IRRX, MUXMODE0, PULL_DISABLED, INPUT },
- { UART3_TX_IRTX, MUXMODE0, PULL_DISABLED, OUTPUT },
- { HSUSB0_CLK, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_STP, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
- { HSUSB0_DIR, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_NXT, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_DATA0, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_DATA1, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_DATA2, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_DATA3, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_DATA4, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_DATA5, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_DATA6, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_DATA7, MUXMODE0, PULL_DISABLED, INPUT },
- { I2C1_SCL, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { I2C1_SDA, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { I2C2_SCL, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { I2C2_SDA, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { I2C3_SCL, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { I2C3_SDA, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { HDQ_SIO, MUXMODE4, PULL_UP_SELECTED, OUTPUT },
- { MCSPI1_CLK, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MCSPI1_SIMO, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MCSPI1_SOMI, MUXMODE0, PULL_DISABLED, INPUT },
- { MCSPI1_CS0, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MCSPI1_CS1, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
- { MCSPI1_CS2, MUXMODE4, PULL_DISABLED, OUTPUT },
- { MCSPI1_CS3, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { MCSPI2_CLK, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { MCSPI2_SIMO, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { MCSPI2_SOMI, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { MCSPI2_CS0, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { MCSPI2_CS1, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { SYS_NIRQ, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { SYS_CLKOUT2, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { ETK_CLK, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
- { ETK_CTL, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
- { ETK_D0, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D1, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D2, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D3, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D4, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D5, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D6, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D7, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D8, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D9, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { ETK_D10, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
- { ETK_D11, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
- { ETK_D12, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D13, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D14, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D15, MUXMODE3, PULL_UP_SELECTED, INPUT }
-};
-
-VOID
-PadConfiguration (
- VOID
- )
-{
- UINTN Index;
- UINT16 PadConfiguration;
- UINTN NumPinsToConfigure = sizeof(PadConfigurationTable)/sizeof(PAD_CONFIGURATION);
-
- for (Index = 0; Index < NumPinsToConfigure; Index++) {
- //Set up Pad configuration for particular pin.
- PadConfiguration = (PadConfigurationTable[Index].MuxMode << MUXMODE_OFFSET);
- PadConfiguration |= (PadConfigurationTable[Index].PullConfig << PULL_CONFIG_OFFSET);
- PadConfiguration |= (PadConfigurationTable[Index].InputEnable << INPUTENABLE_OFFSET);
-
- //Configure the pin with specific Pad configuration.
- MmioWrite16(PadConfigurationTable[Index].Pin, PadConfiguration);
- }
-}
deleted file mode 100644
@@ -1,186 +0,0 @@
-/** @file
- C Entry point for the SEC. First C code after the reset vector.
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-
-#include <Library/DebugLib.h>
-#include <Library/PrePiLib.h>
-#include <Library/PcdLib.h>
-#include <Library/IoLib.h>
-#include <Library/OmapLib.h>
-#include <Library/ArmLib.h>
-#include <Library/PeCoffGetEntryPointLib.h>
-#include <Library/DebugAgentLib.h>
-
-#include <Ppi/GuidedSectionExtraction.h>
-#include <Guid/LzmaDecompress.h>
-#include <Omap3530/Omap3530.h>
-
-#include "LzmaDecompress.h"
-
-VOID
-PadConfiguration (
- VOID
- );
-
-VOID
-ClockInit (
- VOID
- );
-
-
-VOID
-TimerInit (
- VOID
- )
-{
- UINTN Timer = FixedPcdGet32(PcdOmap35xxFreeTimer);
- UINT32 TimerBaseAddress = TimerBase(Timer);
-
- // Set source clock for GPT3 & GPT4 to SYS_CLK
- MmioOr32 (CM_CLKSEL_PER, CM_CLKSEL_PER_CLKSEL_GPT3_SYS | CM_CLKSEL_PER_CLKSEL_GPT4_SYS);
-
- // Set count & reload registers
- MmioWrite32 (TimerBaseAddress + GPTIMER_TCRR, 0x00000000);
- MmioWrite32 (TimerBaseAddress + GPTIMER_TLDR, 0x00000000);
-
- // Disable interrupts
- MmioWrite32 (TimerBaseAddress + GPTIMER_TIER, TIER_TCAR_IT_DISABLE | TIER_OVF_IT_DISABLE | TIER_MAT_IT_DISABLE);
-
- // Start Timer
- MmioWrite32 (TimerBaseAddress + GPTIMER_TCLR, TCLR_AR_AUTORELOAD | TCLR_ST_ON);
-
- //Disable OMAP Watchdog timer (WDT2)
- MmioWrite32 (WDTIMER2_BASE + WSPR, 0xAAAA);
- DEBUG ((EFI_D_ERROR, "Magic delay to disable watchdog timers properly.\n"));
- MmioWrite32 (WDTIMER2_BASE + WSPR, 0x5555);
-}
-
-VOID
-UartInit (
- VOID
- )
-{
- UINTN Uart = FixedPcdGet32(PcdOmap35xxConsoleUart);
- UINT32 UartBaseAddress = UartBase(Uart);
-
- // Set MODE_SELECT=DISABLE before trying to initialize or modify DLL, DLH registers.
- MmioWrite32 (UartBaseAddress + UART_MDR1_REG, UART_MDR1_MODE_SELECT_DISABLE);
-
- // Put device in configuration mode.
- MmioWrite32 (UartBaseAddress + UART_LCR_REG, UART_LCR_DIV_EN_ENABLE);
-
- // Programmable divisor N = 48Mhz/16/115200 = 26
- MmioWrite32 (UartBaseAddress + UART_DLL_REG, 3000000/FixedPcdGet64 (PcdUartDefaultBaudRate)); // low divisor
- MmioWrite32 (UartBaseAddress + UART_DLH_REG, 0); // high divisor
-
- // Enter into UART operational mode.
- MmioWrite32 (UartBaseAddress + UART_LCR_REG, UART_LCR_DIV_EN_DISABLE | UART_LCR_CHAR_LENGTH_8);
-
- // Force DTR and RTS output to active
- MmioWrite32 (UartBaseAddress + UART_MCR_REG, UART_MCR_RTS_FORCE_ACTIVE | UART_MCR_DTR_FORCE_ACTIVE);
-
- // Clear & enable fifos
- MmioWrite32 (UartBaseAddress + UART_FCR_REG, UART_FCR_TX_FIFO_CLEAR | UART_FCR_RX_FIFO_CLEAR | UART_FCR_FIFO_ENABLE);
-
- // Restore MODE_SELECT
- MmioWrite32 (UartBaseAddress + UART_MDR1_REG, UART_MDR1_MODE_SELECT_UART_16X);
-}
-
-VOID
-InitCache (
- IN UINT32 MemoryBase,
- IN UINT32 MemoryLength
- );
-
-EFI_STATUS
-EFIAPI
-ExtractGuidedSectionLibConstructor (
- VOID
- );
-
-EFI_STATUS
-EFIAPI
-LzmaDecompressLibConstructor (
- VOID
- );
-
-
-VOID
-CEntryPoint (
- IN VOID *MemoryBase,
- IN UINTN MemorySize,
- IN VOID *StackBase,
- IN UINTN StackSize
- )
-{
- VOID *HobBase;
-
- // Build a basic HOB list
- HobBase = (VOID *)(UINTN)(FixedPcdGet32(PcdEmbeddedFdBaseAddress) + FixedPcdGet32(PcdEmbeddedFdSize));
- CreateHobList (MemoryBase, MemorySize, HobBase, StackBase);
-
- //Set up Pin muxing.
- PadConfiguration ();
-
- // Set up system clocking
- ClockInit ();
-
-
- // Enable program flow prediction, if supported.
- ArmEnableBranchPrediction ();
-
- // Initialize CPU cache
- InitCache ((UINT32)MemoryBase, (UINT32)MemorySize);
-
- // Add memory allocation hob for relocated FD
- BuildMemoryAllocationHob (FixedPcdGet32(PcdEmbeddedFdBaseAddress), FixedPcdGet32(PcdEmbeddedFdSize), EfiBootServicesData);
-
- // Add the FVs to the hob list
- BuildFvHob (PcdGet32(PcdFlashFvMainBase), PcdGet32(PcdFlashFvMainSize));
-
- // Start talking
- UartInit ();
-
- InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
- SaveAndSetDebugTimerInterrupt (TRUE);
-
- DEBUG ((EFI_D_ERROR, "UART Enabled\n"));
-
- // Start up a free running timer so that the timer lib will work
- TimerInit ();
-
- // SEC phase needs to run library constructors by hand.
- ExtractGuidedSectionLibConstructor ();
- LzmaDecompressLibConstructor ();
-
- // Build HOBs to pass up our version of stuff the DXE Core needs to save space
- BuildPeCoffLoaderHob ();
- BuildExtractSectionHob (
- &gLzmaCustomDecompressGuid,
- LzmaGuidedSectionGetInfo,
- LzmaGuidedSectionExtraction
- );
-
- // Assume the FV that contains the SEC (our code) also contains a compressed FV.
- DecompressFirstFv ();
-
- // Load the DXE Core and transfer control to it
- LoadDxeCoreFromFv (NULL, 0);
-
- // DXE Core should always load and never return
- ASSERT (FALSE);
-}
-
deleted file mode 100644
@@ -1,74 +0,0 @@
-
-#/** @file
-# SEC - Reset vector code that jumps to C and loads DXE core
-#
-# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = BeagleBoardSec
- FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8
- MODULE_TYPE = SEC
- VERSION_STRING = 1.0
-
-
-[Sources.ARM]
- Arm/ModuleEntryPoint.S | GCC
- Arm/ModuleEntryPoint.asm | RVCT
-
-[Sources.ARM]
- Sec.c
- Cache.c
- PadConfiguration.c
- Clock.c
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/Omap35xxPkg.dec
- IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
-
-[LibraryClasses]
- BaseLib
- DebugLib
- ArmLib
- ArmMmuLib
- IoLib
- ExtractGuidedSectionLib
- LzmaDecompressLib
- OmapLib
- PeCoffGetEntryPointLib
- DebugAgentLib
- MemoryAllocationLib
- PrePiHobListPointerLib
-
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
-[FixedPcd]
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
- gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
- gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
- gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
- gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
- gEmbeddedTokenSpaceGuid.PcdPrePiStackSize
- gEmbeddedTokenSpaceGuid.PcdPrePiStackBase
- gEmbeddedTokenSpaceGuid.PcdMemoryBase
- gEmbeddedTokenSpaceGuid.PcdMemorySize
-
- gOmap35xxTokenSpaceGuid.PcdOmap35xxConsoleUart
- gOmap35xxTokenSpaceGuid.PcdOmap35xxFreeTimer
-
- gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
-
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> --- Platforms/TexasInstruments/BeagleBoard/Sec/Arm/ModuleEntryPoint.S | 85 ------ Platforms/TexasInstruments/BeagleBoard/Sec/Arm/ModuleEntryPoint.asm | 89 ------ Platforms/TexasInstruments/BeagleBoard/Sec/Cache.c | 80 ------ Platforms/TexasInstruments/BeagleBoard/Sec/Clock.c | 70 ----- Platforms/TexasInstruments/BeagleBoard/Sec/LzmaDecompress.h | 103 ------- Platforms/TexasInstruments/BeagleBoard/Sec/PadConfiguration.c | 282 -------------------- Platforms/TexasInstruments/BeagleBoard/Sec/Sec.c | 186 ------------- Platforms/TexasInstruments/BeagleBoard/Sec/Sec.inf | 74 ----- 8 files changed, 969 deletions(-) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel